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Title:
窒化物系半導体装置およびその製造方法
Document Type and Number:
Japanese Patent JP5579435
Kind Code:
B2
Abstract:
Light emitting efficiency is improved by reducing thermal damage of an active layer (3) by forming a p-type semiconductor layer (4) at a low temperature and reducing a forward direction voltage (Vf). A nitride semiconductor device is provided with an active layer (3) composed of a multiquantum well containing indium; a first nitride semiconductor layer (41) containing a p-type impurity; a second nitride semiconductor layer (42) containing a p-type impurity at a concentration lower than that of the p-type impurity in the first nitride semiconductor layer (41); a third nitride semiconductor layer (43) containing a p-type impurity at a concentration higher than that of the p-type impurity in the second nitride semiconductor layer (42); and a fourth nitride semiconductor layer (44) containing a p-type impurity at a concentration lower than that of the p-type impurity in the third nitride semiconductor layer (43). In a method for manufacturing such nitride semiconductor device, a material gas is supplied by a carrier gas not containing hydrogen, and at last a part of the first nitride semiconductor layer (41) to the fourth nitride semiconductor layer (44) is formed.

Inventors:
Tetsuya Fujiwara
Kazuhiko Senda
Application Number:
JP2009519280A
Publication Date:
August 27, 2014
Filing Date:
June 11, 2008
Export Citation:
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Assignee:
Loam incorporated company
International Classes:
H01L33/32; H01L21/205; H01L21/28; H01L33/06; H01L33/42; H01L33/02
Domestic Patent References:
JP2006120856A2006-05-11
JP2002026388A2002-01-25
JP2000307149A2000-11-02
JP2007134415A2007-05-31
JP2002319702A2002-10-31
JPH09153642A1997-06-10
JP2004087930A2004-03-18
JP2006093358A2006-04-06
Attorney, Agent or Firm:
Hidekazu Miyoshi
Keishin Terayama
Miyoshi Hiroyuki
Ichitaro Ito