Title:
RECEPTION DEVICE FOR DIGITAL COMMUNICATION AND BIT SYNCHRONISM ESTABLISHMENT METHOD
Document Type and Number:
Japanese Patent JP2017183915
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a reception device for digital communication capable of surely reducing power consumption in a standby state.SOLUTION: In a standby state, a reception device for digital communication is operated by using a frequency divided clock signal obtained by dividing a frequency of an ordinary reception clock signal into 1/N (N:positive integer of exponentiation of 2) by a frequency divided clock generation part 3 as an operation clock signal and based on a PN code received by thinning a PN code transmitted from a transmission device as a bit synchronizing signal into 1/N, a PN code for the reception device is generated by a shift register 5 and a PN code generation part 6. In a matching discrimination part 7, matching of the PN code from the transmission device and the generated PN code for the reception device is detected. When it is confirmed that bit synchronism is established, the standby state is switched to a state under data reception, and a selector 4 switches the operation clock signal from the low-speed frequency divided clock signal to the ordinary reception clock signal extracted from information from the transmission device.SELECTED DRAWING: Figure 1
Inventors:
SAITO AKIO
Application Number:
JP2016066226A
Publication Date:
October 05, 2017
Filing Date:
March 29, 2016
Export Citation:
Assignee:
NEC SPACE TECHNOLOGIES LTD
International Classes:
H04L7/04
Attorney, Agent or Firm:
Ken Ieiri