Title:
半導体装置
Document Type and Number:
Japanese Patent JP7462575
Kind Code:
B2
Abstract:
A semiconductor device having a novel structure is provided. The semiconductor device includes a first element layer including a first memory cell, a second element layer including a second memory cell, and a silicon substrate including a driver circuit. The first element layer is provided between the silicon substrate and the second element layer. The first memory cell includes a first transistor and a first capacitor. The second memory cell includes a second transistor and a second capacitor. One of a source and a drain of the first transistor and one of a source and a drain of the second transistor are each electrically connected to a wiring for electrical connection to the driver circuit. The wiring is in contact with a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor and is provided in a direction perpendicular or substantially perpendicular to a surface of the silicon substrate.
Inventors:
Tatsuya Onuki
Hiroto Yakubo
Yuki Okamoto
Seiya Saito
Kiyoshi Kato
Shunpei Yamazaki
Hiroto Yakubo
Yuki Okamoto
Seiya Saito
Kiyoshi Kato
Shunpei Yamazaki
Application Number:
JP2020567657A
Publication Date:
April 05, 2024
Filing Date:
November 19, 2019
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H10B12/00; H01L21/336; H01L29/788; H01L29/792; H10B41/70
Domestic Patent References:
| JP2015181159A | ||||
| JP2013065638A | ||||
| JP2016192578A | ||||
| JP2000312006A | ||||
| JP2004056140A | ||||
| JP2012119048A |
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