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Patent Searching and Data


Title:
10G-KR HIGH-SPEED SIGNAL OPTIMIZATION METHOD AND SYSTEM
Document Type and Number:
WIPO Patent Application WO/2019/095788
Kind Code:
A1
Abstract:
The present invention provides a 10G-KR high-speed signal optimization method and system. The method comprises: obtaining a signal system topology structure; obtaining a standard insertion loss of a signal link; sequentially adjusting FFE, CTLE, and DFE parameter values to obtain an insertion loss after each adjustment; and determining optimal FFE, CTLE, and DFE parameter values according to a ratio of the insertion loss after each adjustment to the standard insertion loss. By adjusting the FFE, CTLE, and DFE parameters in the signal system topology structure, and the comparing the ratio of the insertion loss of a signal to the standard insertion loss to determine optimal parameter values, the present invention solves the problem of high signal loss caused by the fact that the FFE, CTLE, and DFE parameters in the existing 10G-KR high-speed signal depend on personal experience and manufacturer setting values, obtains a better signal link status under the condition of ensuring that electronic components are not changed, reduces the signal loss, improves the signal quality and the signal system stability, and avoids the economic loss.

Inventors:
LIU FAZHI (CN)
Application Number:
PCT/CN2018/103410
Publication Date:
May 23, 2019
Filing Date:
August 31, 2018
Export Citation:
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Assignee:
ZHENGZHOU YUNHAI INFORMATION TECH CO LTD (CN)
International Classes:
G06F11/22
Foreign References:
CN107943627A2018-04-20
CN104050122A2014-09-17
US20130332101A12013-12-12
US9313017B12016-04-12
Other References:
JIANG, WEI: "25 (Signal Integrity Design of High-Speed Serial Link over Backplane at 25 Gbps)", CHINA MASTER'S THESES FULL-TEXT DATABASE, 15 February 2017 (2017-02-15)
Attorney, Agent or Firm:
UNITALEN ATTORNEYS AT LAW (CN)
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