Feedback amplifiers are commonly employed to convert the sensed current measurement to a voltage measurement. The voltage is applied to an analog to digital (A/D) converter, the output of which is processed by a computer to generate a desired output.

The most straightforward means for measuring current is an operational amplifier (hereinafter"op-amp") feedback configuration which employs a resistor R as a feedback element as shown in FIG. 1A. The operational amplifier 30 includes a negative feedback terminal 32A, a positive feedback terminal 32B, and an output terminal 34. Resistor R is coupled across the output terminal 34 and negative feedback terminal 32A, thereby providing a feedback loop. The positive feedback terminal 32B is grounded as shown. In this manner, the output voltage V,, is related to the input current Ijn according to the following relationship: Vo=IjnRo (1) Such a configuration requires a large resistor R for measurement of small levels of current; however large resistors are a source for thermal noise. In addition, stray capacitance inherent in the op-amp 40 and resistor R in conjunction with a high value resistor R can lead to an impractically-large time constant.

The dynamic range of such a configuration is limited by the use of a single resistor R. When large current values are to be measured, a small value resistor R is required or else the voltage at the output V. will saturate, i. e., Vo will match the source voltage levels applied to the op-amp 30. A resistor bank including resistors Ra, Rb, Rc and physical switches Sa, Sb, Sc provides selectable resistance levels.

Such a configuration is undesirable, as switches with minimal leakage current are sophisticated and therefore expensive. A further limitation of this configuration is that it requires a high-resolution analog-to-digital converter 56 to obtain accurate low-level current measurements, in the case where few resistors are used in the resistor bank.

An integrator amplifier as shown in Prior Art FIG. 1 B employs a capacitor C as the feedback element. This circuit integrates the input signal li,, to provide an output voltage V.. In this embodiment, the relationship is characterized as: dV I.

C' dt C (2) As capacitor C charges, the voltage across the capacitor ramps upward or downward, depending on the direction of the applied current I jn The slope of the ramp dVo/dt varies with the level of applied input current lin. The output voltage Vo is measured for a predetermined time interval to provide the degree of the slope, and a corresponding input current Iin is determined based on that value. A reset switch S periodically discharges the capacitor C to prevent saturation of the output voltage Vo.

The integrator embodiment mitigates the thermal noise problem; however it suffers from several limitations. A small capacitor C is required for small current measurement; for example, if measurements on the order of 1 pA are required, a small capacitor C, for example a I pA capacitor, is employed. Such a small capacitance is nearly equal to the parasitic capacitance of the op-amp 30, which varies with the input signal and is sensitive to temperature. This embodiment is further limited by leakage current through the op-amp 30 when the switch S is open.

To achieve wide-dynamic range, a bank of capacitors are required, and therefore a switch is required to select a capacitance level. This introduces the imitations described above in the FIG. 1A embodiment. The primary limitation of this embodiment lies in that field effect transistors (FETs) are commonly used for the reset switch S, which tends to introduce further leakage current, adversely affecting signal measurements.

A logarithmic amplifier, as shown in Prior Art FIG. 1 C employs a diode D as

the feedback element for the op-amp 30. The transfer function for this embodiment is given by: kT Iin 1n{}(3)Vo= 1Is where k is the Boltzman time constant, T is temperature in Kelvin, q is the electron charge, li,, is the input current, and 1, is the reverse saturation current (diode- dependent, usually on the order of 10-'5 A). A second diode D, is included to allow for bipolar transmission.

The logarithmic amplifier embodiment takes advantage of the logarithmic <BR> <BR> <BR> <BR> relationship between output voltage V, and input current I in introduced by the diodes D,, D2, to offer a significant improvement in dynamic range over the aforementioned embodiments. However, it suffers from the limitation of extreme temperature sensitivity, due to the dependence of the transfer function on T, but especially due to the exponential temperature-dependency of the reverse saturation current factor I,.

For example, the temperature coefficient causes an output voltage V. variance at a rate of approximately-2.1 mV/C° near room temperature. This results in a decade variance in V. when the operating temperature changes by 30°C.

To avoid this problem, some have employed a differential log measurement to cancel the temperature dependency off,, which provides a certain level of improvement. The temperature of the circuit can be stabilized; however, this is an expensive solution, which proves to be impractical for many applications.

As illustrated in the schematic diagram of Prior Art Fig 1D, others have employed a calibration technique which periodically provides a known reference current Iref to the amplifier 30, and measures the resulting output voltage V.. By taking data over a range of reference current levels Iref, a calibration chart can be generated and used to correct sensor measurements; thus, rendering the amplifier insensitive to temperature.

To generate the known reference current values irez, a switchable resistor bank 31, including resistors RA, RB, RN, and corresponding switches SA, SB, SN, has

been employed in combination with a reference voltage source Vref. Such a configuration introduces leakage current at the switches SA, SB, SN, and, more significantly, generates a large reference current Iref error due to DC offset error at the op-amp 30, which can lead to excessive error when measuring low current levels.

For example, when introducing reference current l, ef levels on the order of lpA, to generate the I pA reference current, a 1GQ resistor is required assuming an input voltage of 1 mV. Assuming a DC offset in the op-amp 30 of 1 mV (a common DC offset error in electrometer grade op-amps), this would lead to an error factor of 100 percent. Therefore, in this configuration, when the offset error of the op-amp 30 approaches the input voltage Bref, the resultant error in the input current irez ifs significant, limiting performance of the circuit.

Summary of the Invention The present invention is directed to an apparatus and method for current measurement over a wide-dynamic range that includes extremely low levels, in a manner which overcomes the limitations of the prior art. In particular, the present invention provides a logarithmic amplifier configuration which mitigates and/or eliminates sensitivity to temperature.

Calibration currents are generated by application of a voltage ramp of selectable slope to a capacitor. This provides a range of known selectable current levels for periodic calibration of the logarithmic amplifier. The selectable current levels can also be advantageously used to provide a fixed bias current to the input of the logarithmic amplifier for improving the response time of the amplifier for small sensor current measurements.

The present invention offers temperature-independent, accurate measurement of current over at least nine decades of coverage, for example 10fA-10, uA. No resistor banks, or capacitor banks are required. Furthermore, DC offset error introduced in the generation of reference current is greatly reduced or eliminated.

In a first embodiment, the present invention is directed to an apparatus comprising a logarithmic amplifier for generating an output voltage as a logarithmic function of a reference current. An integrator amplifier generates a ramp voltage as a

function of input current received at an input. A capacitor coupled in series between the output of the integrator amplifier and the input of the logarithmic amplifier converts the ramp voltage to a reference current. When the reference current is applied to the logarithmic amplifier, a corresponding output voltage is generated.

The output voltage is a logarithmic function of the reference current.

In a first preferred embodiment, a series of known reference currents are generated by the integrator amplifier and capacitor. The reference currents are periodically applied to the logarithmic amplifier, for example following a significant temperature change. The corresponding set of output voltages are stored to provide a calibration function which characterizes the response of the logarithmic amplifier. In this manner, the response of the logarithmic amplifier is rendered insensitive to temperature.

In a second preferred embodiment, the reference current generated by the integrator amplifier and capacitor is applied as a bias current and added to sensor current input at the logarithmic amplifier to improve the response time of the logarithmic amplifier.

In a third preferred embodiment, a sequence of reference current steps are generated by the integrator amplifier and capacitor and periodically applied as a boost current to assist in the recovery of the circuit from periodic current spikes injected into the logarithmic amplifier when the integrator amplifier undergoes a reset operation.

In a fourth preferred embodiment, the reference current generated by the integrator amplifier produces a known slew rate in the output voltage. A sensor current is applied to the reference current which modulates the slew rate. The sensor current is determined by monitoring the degree of modulation in slew rate. This embodiment is especially applicable to measurement of small sensor circuit values.

Brief Description of the Drawings The foregoing and other objects, features and advantages of the invention will be apparent from the more particular description of preferred embodiments of the invention, as illustrated in the accompanying drawings in which like reference

characters refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention.

FIG. 1A is schematic representation of a prior art feedback amplifier employing a resistor R as a feedback element.

FIG. 1B is a schematic illustration of a prior art integrator amplifier employing a capacitor C as a feedback element.

FIG. 1 C is a schematic illustration of a prior art logarithmic amplifier employing a diode D as a feedback element.

FIG. 1D is a schematic illustration of a prior art technique for calibration of the logarithmic amplifier of FIG. 1 C using known reference current values.

FIG. 2 is a schematic representation of the logarithmic amplifier of the present invention employing a reference calibration current I,,, f.

FIG. 3 is a calibration chart for the output voltage V. response of the logarithmic amplifier as a function of reference current 1, for a range of temperatures, in accordance with the present invention.

FIG. 4 illustrates the calibration circuit of the present invention for generating reference current Iref.

FIG. 5 illustrates an alternative means for generating an input current to the integrator amplifier in accordance with the present invention.

FIG. 6 is a chart illustrating the respective behavior of voltages VOl Vo2, and current Iref in accordance with the present invention.

FIG. 7A is a chart illustrating the responses of output voltages VOlS Vo2, and Iref as functions of time t, illustrating the application of bias currentlbia, to assist output voltage Vo2 in recovering from a spike that results during a periodic transition in Vol in accordance with the present invention.

FIG. 7B illustrates the behavior of output voltage Voz when permitted to settle without assistance from a boost current Iboost, illustrating the effect of low levels of sensor input current on the slope of the Voz recovery, for fine-resolution current sensing on the order of 10 fA in accordance with the present invention.

FIG. 8 is a chart illustrating preferred steps for assisting recovery of output voltage Vo2 in accordance with the present invention.

Detailed Description of Preferred Embodiments The present invention is directed to a method and apparatus for calibrating a logarithmic amplifier in a manner which mitigates and/or eliminates sensitivity to temperature. As an added benefit, the present invention improves sensitivity and response time for measurement of small sensor current levels, i. e., on the order of lOfA.

As illustrated in FIG. 2, the present invention includes a logarithmic amplifier 50 comprising an op-amp X, for example an electrometer-grade CMOS op-amp having a low bias current on the order of 10fA, and first and second diodes D 1, D2 The logarithmic amplifier 50 generates an output voltage V. as a function of sensor current Isensor according to the exponential relationship of Equation 3 above. The present invention further includes a calibration circuit 52 for generating an accurate reference current Iref adjustable over a wide range of selectable levels, for example lpA, 10pA,..., 100, uA.

During a calibration sequence, the sensor current Isensor input is disengaged and the reference current Iref is activated. For each applied reference current level, the corresponding output voltage V. is recorded and stored. The result is a calibration chart 54 as shown in FIG. 3, representative of the behavior of the logarithmic amplifier as a function of varying operating temperature T. The chart is stored in memory as a set of discrete data points and employed to correct sensor current readings using well-known interpolation techniques. As the operating temperature T,, T2, T3 of the logarithmic amplifier changes, the calibration curve 54 varies accordingly. The calibration data is then used to provide both temperature- independent and accurate sensor current Iseso measurements. By performing temperature calibrations periodically, for example, every five minutes, or alternatively at every significant temperature change, the system can achieve accurate current measurements continuously over a range of operating conditions.

FIG. 4 is a schematic representation of a preferred calibration circuit 52 in accordance with the present invention. The circuit of FIG. 4 includes a standard logarithmic amplifier 50 including op-amp X2 and diodes D,, D2. Absent the calibration circuit 52, the output voltage Vo2 of the logarithmic amplifier 50 is a function of sensor current Isensor. The calibration circuit 52 generates a reference

current Iref which, as described above, is used to calibrate the logarithmic amplifier 50 to mitigate the effects of temperature sensitivity, and further, as will be described below, to provide a bias current for improving the system time response for measurement of small sensor current Isensor values.

In a preferred embodiment, the calibration circuit 52 includes an integrator amplifier 51 formed by op-amp X,, including capacitor C, as a feedback element. A selectable input voltage Vin ils accurately generated by digital-to-analog (D/A) converter 58. The input voltage V, n is applied to resistor R, to generate an input current Iin which is, in turn, applied to the integrator amplifier 51. An output signal Vol is generated at the output of the integrator amplifier 51 in the form of a ramp voltage which is characterized by the following equation: Iin=VindV= dt V Z , C,' In this manner, the ramp voltage at output VOl is controlled by selecting the input voltage Vjn provided by D/A converter 58. The integrator amplifier 51 is periodically reset by switch S, to prevent the ramp voltage VOl from saturating at the level of the op-amp X, power source.

Ramp current VOl is, in turn, applied to capacitor C2 to generate a reference current Irep The reference current Iref is given by the following relationship: VinC2dVo1Iin C2=C2={}(5)Iref= R1C1dtC1 In this manner, the reference current efis attenuated by the relationship of capacitor <BR> <BR> C2 to capacitor C1. For example, if C2 comprises a 10pF capacitor and C, comprises a 0.01, uf capacitor, this would result in a scaling factor of 10-3. In other words, the integrator amplifier circuit 52, including op-amp X,, resistor R,, capacitor Cl, and reset switch S, operate at a current level li,, that is 1000 times higher than reference current Irep For example, to generate a I pA reference current irez, the corresponding li,, would be 1nA, so the leakage current in op-amp X, and reset switch S, is made

negligible by the circuit configuration of the present invention. In this manner, leaky switches are placed in a non-critical portion of the device, and not in the sensitive logarithmic amplifier 50. Furthermore, since no resistor is employed in providing the reference current lef to the logarithmic amplifier 50, the DC offset of op-amp X2 is irrelevant in the calculations; as is the DC offset of op-amp X,, since the voltage Vi,, and resistor R, can be adjusted to optimize the offset voltage of X,. For this reason, a resistor bank 60 including resistors RaS Rb SRn and switches Sa, Sb, Sn can be employed to increase the range of the D/A converter 58. Such a resistor bank 60 will have a minimal effect on the reference current l, f due to the attenuation described above.

By filtering out DC offset error through capacitor C, and by providing the reference current l, ef, DC offset in op-amp X2 is minimized, and the logarithmic relationship between voltage Vo, and sensor current Isensor is maintained. Since the reference current Iref is generated from a voltage ramp, any DC offset error generated at op-amp X, is irrelevant. In addition, the reset switch S,, preferably a FET, has no adverse effects on the accuracy of the measurement, assuming a large attenuation ratio between capacitors C2 and C,.

When the reference current Iref is applied to the logarithmic amplifier 50, the relationship between Vo2 and Vin can be described as follows: kT Iref kT Vin C2 Vo2 = 1n { } = 1n { {}}. (6) q Is 1 IsR1 C1 In this manner, periodic calibration of the logarithmic amplifier 50 maintains the logarithmic relationship between Vo2 and the sensor current Isensor over a range of operating temperatures and over wide dynamic range.

FIG. 6 illustrates the behavior of the output voltage Vol of the integrator <BR> <BR> <BR> <BR> amplifier 51 (see FIG. 4) and output voltage Vo2 of the logarithmic amplifier 52 as a result of two different applied input voltages Vjnl (dashed lines) and Vjn2 (solid lines).

Following a periodic reset 102 of switch S,, capacitor C, begins to charge, causing a ramp 104 of output voltage VOl. Note that the slew rate of the ramp 104 is a function of applied input voltage Vin1, Vin2. As the ramp voltage VOl is applied to capacitor C2, a DC reference current Iref 106 is generated. During application of the DC

reference current to the logarithmic amplifier 50, output voltage Vo2 eventually settles to a voltage level 108. The rate of settling, or slew rate 110 caused by the charging of the parasitic capacitance of the diodes D,, D,, is dependent on the strength of the reference current 1,, f. In general, a larger applied reference current slews at a faster rate 110 and results in a higher output voltage level 108.

At the onset of a reset 102, the capacitor C, is discharged at an extremely fast rate, causing an immediate upward slope 114 in output voltage VOl of the integrator amplifier 52. This, in turn, causes a corresponding spike 112 in the reference current l, ef, which causes a corresponding sudden adjustment 124 in output voltage Vo2. If the adjustment 124 is large, and the applied reference currently is relatively small, then it may take considerable time for the output voltage to settle. A technique for improving the settling time will be described below.

In this manner, output voltage VOl operates on capacitor C2 to provide an accurate reference current l, ef for characterizing the behavior of logarithmic amplifier 50. By generating a series of reference currents Irep the calibration curve for the logarithmic amplifier 50 can be generated, and the system can operate accurately, independent of temperature. The reference current Iref is provided accurately, without the adverse impact of DC offset errors at op-amp X2. Any DC offset error introduced at op-amp X, is attenuated by a factor of one thousand, assuming the ratio C2/C, = 1000. Accordingly, an accurate calibration curve 54 as shown in FIG. 3 can be generated at regular periodic intervals for compensating for the temperature dependence of the logarithmic amplifier 50.

As described above, the calibration curve comprises a discrete set of measured output voltages Vo2 as a function of known applied reference currents Iref, for example generated from a plurality of decades of reference currents Irep at a given temperature received and processed by the logarithmic amplifier 50, an output voltage Vo2 is generated and applied, for example, to the two nearest data points on the calibration curve 54 (see FIG. 3). The corresponding current value is interpolated form the two nearest data points and is used as the sensor current measurement Isensor calibrated to the present operating temperature T.

The present invention further confers the benefit of providing a bias current Ixia, for improving the response time of the logarithmic amplifier 50 when measuring

low levels of sensor current Isensoa As explained above, the logarithmic amplifier 50 includes a stray parasitic capacitance inherent in the semiconductor junction of diodes D,, D (see FIG. 4). In a typical system, this stray capacitance may be on the order of 2-3pF. State-of-the-art current measurement devices seek resolution on the order of 0. lpA, or less. The stray capacitance (assume 3pF) can be considered as a capacitor applied in parallel to diodes D,, D2. Assuming an input current of 0. lpA applied to the logarithmic amplifier 50, it will take some time for the output voltage Vo2 to settle, due to the relatively large stray capacitance of 3pF being charged by a relatively small 0.1pA current. According to the logarithmic amplifier characterization curve, an input current of O. lpA, may correspond, for example, to an output voltage of 120 mV.

Assuming that from a previous cycle, output voltage Vo2 was set at 880 mV, the circuit must slew through approximately 1 volt for output voltage Vo, to settle at the proper voltage. With a relatively small input current of 0. 1pA and a relatively large stray capacitance of 3pF, this results in a 30 second time constant. This can present a problem in systems which require fast response.

The present invention takes advantage of the calibration data (see FIG. 3) accurately calculated during a previous calibration sequence to provide a known bias current lbia, which is added to the sensor current Isensor and applied to the logarithmic amplifier 50. The bias current Ibias can be accurately generated by the calibration circuit 52 at a level which is an order of magnitude higher than the sensor current Isensor to accelerate the charging of the stray capacitance of diodes D,, D2. This in turn decreases the settling time of output voltage Vo2. The resulting output voltage Vo2 is applied to the calibration curve 54 to determine the combined currents of Isensor + Ibjas.

The known bias current lbia, is then subtracted from the combined current to give the calibrated sensor current Isensoa As an example, assume a sensor current Isensor of 0.1 pA and a bias current 1 of IpA charging a stray capacitance of 3pF across a slew of 1 volt. This would result in a response time of 3 seconds instead of 30 seconds, conferring a ten-fold improvement in response time. In a preferred embodiment, the ratio of the bias current to the sensor current can approach 100: 1 to confer nearly a one hundred fold improvement in response time.

In this manner, the calibration circuit 52 is employed, not only to generate a

reference current Iref for periodic temperature calibration of the logarithmic amplifier 50, but also to confer the additional benefit of improving the response time of the logarithmic amplifier 50 when making small sensor current Isensor measurements. The present invention therefore provides an improved combination of resolution, dynamic range, and response time in the logarithmic amplifier.

In an alternative embodiment, the calibration circuit further allows for selective resolution. For example, if the logarithmic amplifier of the present invention is applied to a mass spectrometer which analyzes a substance by atomic mass unit (amu), a look-up table can be provided in microprocessor memory to adjust the resolution depending on the amu of the substance being sensed. Scan speed is therefore a function of applied bias currentlbia, ; a faster speed reduces the resolution for amu measurements which are not critical to the scan.

FIG. 7A illustrates a further advantage conferred by the present invention.

With reference to the circuit diagram of FIG. 4, during a measurement cycle beginning at time to, the voltage V, n is set by the D/A converter 58, and consequently, voltage Vo2 ramps downward 124 as shown. At time t,, the integrator amplifier 51 is reset 102 by switch S, to prevent saturation. The reset operation 102 generates a ramp 114 of a very steep positive nature between time t, and t2 in output voltage VOl. Accordingly, the resulting reference current 1,, f, which, for example, was previously on the order of-lpA from time to to time t,, undergoes a spike 112 at time t, on the order of 100-1000, uA which lasts until time t2. The spike 112, in turn, <BR> <BR> <BR> <BR> results in a corresponding spike 124 in the output voltage Voz which could take an extremely long time to settle, for example 10 seconds, depending on the initial value of Irep For example, if the initial reference current Iref is on the order of I pA (corresponding to an output voltage Vo2 of 180 mV), it may take several seconds for Vo2 to settle back to its original value, as shown by dashed line 117, due to the stray capacitance in the diodes D,, D2 as described above.

In view of this, in a preferred embodiment of the present invention the calibration circuit 52 periodically generates a"boost"bias current Iboost for assisting the logarithmic amplifier 50 and its corresponding output voltage Vo2 in recovering from the spike 124, thereby greatly reducing on the settling time of voltage Voz as a result of Vol being reset. The boost current b,,,, is preferably applied in steps

according to the chart of FIG. 8, which provides a suggested series of boost current steps, and respective durations, for a small bias current levels ranging from IpA to 10 nA. Application of boost current in steps causes a corresponding rapid exponential decay in output voltage Vo2. In the example of FIG. 7A, a I pA bias current is desired, so according to the chart of FIG. 8, following a reset operation 102, the system controller generates an input voltage Vi, step 10 la suitable for causing a- 100pA bias current step 113a for 50 msec duration. This is followed by a second applied voltage step 101b suitable for causing a-10 pA bias current step 113b for 50 msec duration; followed by application of an input voltage level 101 c suitable for generating a-IpA bias current step. This technique of application of boost current rapidly charges the parasitic capacitance of the logarithmic amplifier 50 and therefore assists the output voltage2 in recovering rapidly according to corresponding exponential decay curves 115a, 115b, 115c, instead of according to decay curve 117.

A sensor reading can then be taken following settling of the final step 115c with the <BR> <BR> <BR> <BR> benefit of a bias current Ibjas of-lpA. In this manner, a large boost current I boost can be temporarily applied to the integrator amplifier for rapid charging of the stray capacitance during measurement of small sensor current values.

The stray capacitance of the logarithmic amplifier 50 can be used as an advantage for measuring extremely low sensor current levels, for example, sensor currents less than 0.1 pA. With reference to FIG. 7B, assuming that the spike 124 generated in the output voltage Voz is permitted to settle naturally, without assistance from the additional boost current Iboost in excess of the I pA bias current, as described above with reference to FIG. 7A, the resulting slope, or slew, of the recovery curve <BR> <BR> <BR> <BR> 117a is proportionally affected by the sensor input current Isensor to increase the slew 117b of the recovery curve. The slew rate can be detected by a fast A/D converter which periodically measures the voltage along the curve as a function of time. The difference in slew is indicative of the sensor current value. In this embodiment, a reset is provided by the arrival of current spike 112. This technique is analogous to an integrator amplifier which uses the parasitic capacitance of the diodes as a feedback capacitor. However, there is no reset switch in parallel with the parasitic capacitance, and therefore, there is no excessive leakage current associated therewith, as in the prior art. Therefore, accurate measurements at extremely low levels can be

realized, for example resolution on the order of 10fA.

While this invention has been particularly shown and described with references to preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.