Title:
ARITHMETIC PROCESSING UNIT AND CONTROL METHOD OF ARITHMETIC PROCESSING UNIT
Document Type and Number:
WIPO Patent Application WO/2020/090025
Kind Code:
A1
Abstract:
This arithmetic processing unit is provided with arithmetic circuits 107, 114 which perform exponential operations or logarithmic operations, and setting units 106, 108, 109 which, if the number of operation repetitions by an arithmetic circuit 107, 114 is less than or equal to a threshold value, sets the number of bits required by the arithmetic circuit 107, 114 for one cycle to a first number, and if the number of operation repetitions is more than the threshold value, sets the number of bits required by the calculation circuit 107, 114 for one cycle to a second number greater than the first number. Thereby, it is possible to converge at a solution in exponential operations or logarithmic operations without increasing the circuit scale.
Inventors:
OSONOI TAKESHI (JP)
WADA HIROYUKI (JP)
WADA HIROYUKI (JP)
Application Number:
PCT/JP2018/040476
Publication Date:
May 07, 2020
Filing Date:
October 31, 2018
Export Citation:
Assignee:
FUJITSU LTD (JP)
International Classes:
G06F7/556
Foreign References:
| JP2009276990A | 2009-11-26 | |||
| JPH0934693A | 1997-02-07 | |||
| JPH02118725A | 1990-05-07 |
Attorney, Agent or Firm:
SANADA, Tamotsu et al. (JP)
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