Title:
BIAS CURRENT CIRCUIT, SIGNAL PROCESSING DEVICE, AND BIAS CURRENT CONTROL METHOD
Document Type and Number:
WIPO Patent Application WO/2017/195864
Kind Code:
A1
Abstract:
A bias current circuit (116) is provided with an N-type MOSFET (202) in which a current source (201) is connected to a drain terminal and a gate terminal, and N-type MOSFETs (203, 204) in which bias current output terminals (212, 213) are connected to respective drain terminals thereof and source terminals thereof are grounded. The bias current circuit (116) is furthermore provided with an N-type MOSFET (205) in which either a drain terminal or a source terminal thereof is connected to the gate terminals of the N-type MOSFET (202) and the N-type MOSFETs (203, 204), and an N-type MOSFET (206) in which a drain terminal thereof is connected to the gate terminals of the N-type MOSFETs (203, 204) and a source terminal thereof is grounded. A control signal that is Low when a bias current is supplied and High when the bias current is stopped is inputted to the gate terminal of the N-type MOSFET (206), and an inversion signal of the control signal is inputted to the gate terminal of the N-type MOSFET (205).
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Inventors:
KAGANO MIKI (JP)
OGOMI TOMOKAZU (JP)
OGOMI TOMOKAZU (JP)
Application Number:
PCT/JP2017/017881
Publication Date:
November 16, 2017
Filing Date:
May 11, 2017
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
H03F3/343; G05F3/26; G07D7/00; H03K17/687
Domestic Patent References:
| WO2012042680A1 | 2012-04-05 |
Foreign References:
| JP2002232277A | 2002-08-16 | |||
| JPH11296245A | 1999-10-29 | |||
| JP2000048237A | 2000-02-18 |
Attorney, Agent or Firm:
KIMURA Mitsuru (JP)
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