Title:
ELECTRONIC DEVICE AND DISPLAY SYSTEM
Document Type and Number:
WIPO Patent Application WO/2023/047228
Kind Code:
A1
Abstract:
Provided is an electronic device having a novel configuration. This electronic device has a semiconductor device having a CPU, an accelerator, and a memory device. The CPU has a scan flip-flop circuit, and a backup circuit electrically connected to the scan flip-flop circuit. The backup circuit has a first transistor. The accelerator has an operation circuit and a data holding circuit electrically connected to the operation circuit. The data holding circuit has a second transistor. The memory device has a memory cell having a third transistor. The first to third transistors have a semiconductor layer having a metal oxide in a channel forming region.
Inventors:
KATO KIYOSHI (JP)
ONUKI TATSUYA (JP)
MIYAGUCHI ATSUSHI (JP)
OIKAWA YOSHIAKI (JP)
YAMAZAKI SHUNPEI (JP)
ONUKI TATSUYA (JP)
MIYAGUCHI ATSUSHI (JP)
OIKAWA YOSHIAKI (JP)
YAMAZAKI SHUNPEI (JP)
Application Number:
PCT/IB2022/058439
Publication Date:
March 30, 2023
Filing Date:
September 08, 2022
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H01L27/04; G06F1/32; G06G7/60; H01L21/336; H01L21/8234; H01L27/06; H01L27/088; H01L29/786; H10B12/00; H10B41/70; H10B99/00
Foreign References:
| JP2019046199A | 2019-03-22 | |||
| JP2013125247A | 2013-06-24 | |||
| JP2019036280A | 2019-03-07 |
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