Title:
INSULATED-GATE TRANSISTOR FOR LIQUID CRYSTAL DISPLAY AND METHOD FOR FABRICATING THE SAME
Document Type and Number:
WIPO Patent Application WO/2001/057588
Kind Code:
A1
Abstract:
Conventionally a drain electrode is overetched when an opening is formed in the five-mask process of a channel-etched TFT, the transistor characteristics are liable to deteriorate because of the formation of a passivation insulating layer, and the fabricating process is too long, thus making it difficult to lower the process cost. According to the invention, the conventional problem is solved. The source interconnect and drain interconnect are each made of a multilayer of a heat-resistant anodizable metal layer and an aluminum-alloy layer, the surfaces are anodized, and an amorphous silicon layer containing impurities is transformed into an oxide silicon layer by using a photomask, thus dispensing with the need for the passivation layer. By forming an additional insulating layer on the exposed scanning line, the step of transforming the semiconductor layer into an island and the step of forming an opening in the insulating layer are rationalized.
Inventors:
KAWASAKI KIYOHIRO (JP)
Application Number:
PCT/JP2001/000805
Publication Date:
August 09, 2001
Filing Date:
February 05, 2001
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD (JP)
KAWASAKI KIYOHIRO (JP)
KAWASAKI KIYOHIRO (JP)
International Classes:
G02F1/1368; H01L21/336; H01L21/77; H01L21/84; H01L27/12; H01L29/417; H01L29/423; H01L29/45; H01L29/786; G02F1/1362; (IPC1-7): G02F1/1368; G09F9/30; H01L21/336; H01L29/786
Foreign References:
| JPH0766416A | 1995-03-10 | |||
| JPS6449272A | 1989-02-23 | |||
| JPH0426827A | 1992-01-30 | |||
| JPS61141478A | 1986-06-28 | |||
| JPH01283518A | 1989-11-15 | |||
| JPH08136951A | 1996-05-31 |
Attorney, Agent or Firm:
Ohmae, Kaname (Uchihiranomachi Chuo-ku Osaka-shi, Osaka, JP)
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