Title:
LAYERED CERAMIC CAPACITOR AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2015/087688
Kind Code:
A1
Abstract:
Provided are a layered ceramic capacitor having an adequate high-temperature load lifespan and a method for manufacturing a layered ceramic capacitor that makes it possible to reliably manufacture said layered ceramic capacitor. An internal electrode is configured so that at least one metal A selected from the group consisting of In, Ga, Zn, Bi, and Pb forms a solid solution in Ni. In the internal electrode, the proportion of A in relation to the total amount of Ni and A present in the region in the vicinity of the interface, which is the region extending to a depth of 2 nm from the surface facing a ceramic dielectric layer, is 1.4 atom% or higher. The relationship between the atom% value X indicating the proportion of A in the region in the vicinity of the interface and the atom% value Y indicating the proportion of A in the in the thickness-direction center region of the internal electrode satisfies the requirement of the relationship: X-Y ≥ 1.0 ...(1). A ceramic laminate is annealed under a predetermined condition, whereby the proportion of the metal A present in the region in the vicinity of the interface is increased.
Inventors:
SUZUKI SHOICHIRO (JP)
YAMAGUCHI SHINICHI (JP)
DOI AKITAKA (JP)
YAMAGUCHI SHINICHI (JP)
DOI AKITAKA (JP)
Application Number:
PCT/JP2014/080889
Publication Date:
June 18, 2015
Filing Date:
November 21, 2014
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H01G4/232; H01G4/12; H01G4/30
Domestic Patent References:
| WO2012111592A1 | 2012-08-23 | |||
| WO2014024538A1 | 2014-02-13 |
Foreign References:
| JPH07326535A | 1995-12-12 | |||
| JPH05290622A | 1993-11-05 | |||
| JP2013098312A | 2013-05-20 |
Attorney, Agent or Firm:
NISHIZAWA, HITOSHI (JP)
Hitoshi Nishizawa (JP)
Hitoshi Nishizawa (JP)
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