Title:
METHOD AND APPARATUS FOR DEMODULATION
Document Type and Number:
WIPO Patent Application WO/2001/084721
Kind Code:
A1
Abstract:
Lower information bits are estimated from the logarithmic likelyhood ratio of the lower information bits. A parity bit is estimated from the logarithmic likelyhood ratio of the parity bit. A coset is estimated from the lower information bits and the parity bit. A transmitted signal point is estimated from the coset. Higher information bits are estimated from the transmitted signal point.
Inventors:
MIYATA YOSHIKUNI (JP)
FUJITA HACHIRO (JP)
NAKAMURA TAKAHIKO (JP)
YOSHIDA HIDEO (JP)
FUJITA HACHIRO (JP)
NAKAMURA TAKAHIKO (JP)
YOSHIDA HIDEO (JP)
Application Number:
PCT/JP2001/001919
Publication Date:
November 08, 2001
Filing Date:
March 12, 2001
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP (JP)
MIYATA YOSHIKUNI (JP)
FUJITA HACHIRO (JP)
NAKAMURA TAKAHIKO (JP)
YOSHIDA HIDEO (JP)
MIYATA YOSHIKUNI (JP)
FUJITA HACHIRO (JP)
NAKAMURA TAKAHIKO (JP)
YOSHIDA HIDEO (JP)
International Classes:
H03M13/13; H03M13/25; H03M13/27; H03M13/29; H03M13/45; H04J11/00; H04L1/00; H04L27/00; H04L27/22; H04L27/38; (IPC1-7): H03M13/25; H03M13/27; H03M13/45; H04J11/00; H04L27/00
Foreign References:
| JP2001127649A | 2001-05-11 | |||
| FR2756996A1 | 1998-06-12 |
Other References:
See also references of EP 1195909A4
Attorney, Agent or Firm:
Tazawa, Hiroaki (Kasumigaseki 3-chome. Chiyoda-ku, Tokyo, JP)
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