Title:
METHOD FOR DRIVING NON-VOLATILE LOGIC CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2011/142067
Kind Code:
A1
Abstract:
In a non-volatile logic circuit (20), along a longitudinal direction of a ferroelectric film (13), a first input electrode (17a) and a second input electrode (17b) are sandwiched between a power source electrode (15) and an output electrode (16). Along a direction which is perpendicular to the longitudinal direction, the first input electrode (17a) is adjacent to the second input electrode (17b). The disclosed method of driving the non-volatile logic circuit (20) is provided with a step for writing one state which has been selected from among four states to the non-volatile logic circuit (20) by applying voltages V1, Va, and Vb according to the selected state to each of a control electrode (12), the first input electrode (17a), and the second input electrode (17b); and a step for determining which of a high-resistance state or a low-resistance state is to be possessed by the non-volatile logic circuit (20) on the basis of a current generated by applying the voltage between the power source electrode (15) and the output electrode (16).
Inventors:
KANEKO YUKIHIRO
Application Number:
PCT/JP2011/001116
Publication Date:
November 17, 2011
Filing Date:
February 25, 2011
Export Citation:
Assignee:
PANASONIC CORP (JP)
KANEKO YUKIHIRO
KANEKO YUKIHIRO
International Classes:
H03K19/185; H01L21/822; H01L27/04; H03K19/20
Domestic Patent References:
| WO2004086625A1 | 2004-10-07 |
Foreign References:
| US20090097299A1 | 2009-04-16 |
Attorney, Agent or Firm:
PATENT CORPORATE BODY ARCO PATENT OFFICE (JP)
Patent business corporation Owner old patent firm (JP)
Patent business corporation Owner old patent firm (JP)
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