[TITLE OF THE INVENTION]

METHOD OF PREPARING AN EMITTER WRAP-THROUGH TYPE SOLAR CELL

[TECHNICAL FIELD]

The present invention relates to a method of preparing a back-contact type of solar cell having via-holes connecting the front side and the rear side of the substrate.

[BACKGROUND OF ART]

In general, a solar cell has electrodes respectively on the front side and the rear side of a semiconductor substrate, and as a front electrode is disposed on the front side, which is a light-receiving side, a light-receiving area decreases by the area of the front electrode. To overcome the problem of reducing the light-receiving area, a back-contact type of solar cell has been proposed.

A back-contact type of solar cell is divided into IBC (interdigitated back contact), MWT (metallization wrap through), EWT (emitter wrap through), and the like types according to the structure. Among then, the EWT type and the MWT type have via-holes connecting the front side and the rear side of the substrate, and the wall surface of the via-hole should also be doped so that carriers may move in the via-hole.

Meanwhile, in order to form an emitter layer by introducing impurities in a semiconductor substrate in the preparation process of a solar cell, a diffusion method has been generally used. However, recently, an ion implantation method has been replacing the diffusion method because it is favorable for the preparation of high efficiency solar cells. Specifically, according to the ion implantation, an ion beam that is accelerated with high energy is implanted on the surface of a semiconductor substrate, and it has advantages in that the implantation depth, distribution, composition, and the like of impurities may be closely controlled, compared to the diffusion method wherein impurities are diffused by heat. Thus, the ion implantation is mainly being used during preparation of high efficiency solar cells through the formation of a shallow emitter, a selector emitter, and the like.

However, unlike a solar cell of a conventional structure wherein an electrode is formed on the front side, a back-contact type of solar cell uses a semiconductor substrate having via-holes that penetrate the front side and the rear side, and particularly, for an emitter wrap through type of solar cell, the wall surface of the via-holes should also be doped. Due to the structural property, the application of ion implantation has been very limited for the preparation of an emitter wrap through type of solar cell. This is because ion implantation is a doping method using a direct-driving ion beam, and it is difficult to dope the wall surface of via-holes therewith.

To overcome the limitation, a method of conducting ion implantation while controlling the angle of the ion beam or a semiconductor substrate has been suggested. However, this method should conduct ion implantation at least twice, thus making the overall process complicated, and it is difficult to uniformly dope impurities on the wall surface of via-holes.

For this reason, in the preparation of an emitter wrap through type of solar cell, a diffusion method is still being applied for the formation of an emitter layer.

[DISCLOSURE OF INVENTION]

[Technical Problem]

It is an object of the present invention to provide a method for preparing an emitter wrap through type of solar cell to which ion implantation can be applied.

[Technical Solution]

According to the present invention, a method for preparing an emitter wrap-through solar cell is provided, including:

preparing a first conductive type of semiconductor substrate having a front side facing the sun during normal operation and a rear side opposite to the front side; forming at least one via-hole that penetrates both sides of the substrate, and that is surrounded by a side wall having an inclined plane on at least a part thereof;

forming a second conductive type of emitter layer on both sides of the substrate and the wall surface of the via-hole by ion implantation;

forming a passivation layer on the front side and the rear side of the substrate; and

forming a first conductive type of base electrode and a second conductive type of emitter electrode on the rear side of the substrate.

The via-hole may have a shape wherein a cross-sectional area horizontal to both sides of the substrate decreases from one side to the other side of the substrate.

The via-hole may be formed by laser drilling, wet etching, dry etching, mechanical drilling, or water jet machining.

Further, the via-hole may have a diameter of 20 to 200 pm on one side, and a ratio of a maximum diameter and a minimum diameter of the via-hole may be 1 :1 .2 to 1 :10.

In addition, the semiconductor substrate may be a p-type doped silicon wafer.

[ADVANTAGEOUS EFFECTS]

According to the method for preparing an emitter wrap through type of solar cell, since ion implantation may be applied for the formation of an emitter layer, an edge isolation process may be omitted thus further simplifying the preparation process, and it is advantageous for the formation of a shallow emitter, a selective emitter, and the like, thus providing a high efficiency back- contact type of solar cell.

[DESCRIPTION OF DRAWINGS]

Fig. 1 and Fig. 2 schematically show the ion implantation process during the preparation process of a common emitter wrap through type of solar cell. Figs. 3 to 5 schematically show the ion implantation process during the preparation process of an emitter wrap through type of solar cell according to one embodiment of the invention.

<Reference numerals>

10: semiconductor substrate

20: via-hole

25: tapered via-hole

27: stepped via-hole having an inclined plane

30: emitter layer

31 : high resistant emitter layer

33: low resistant emitter layer

[DETAILED DESCRIPTION OF THE EMBODIMENTS]

Unless otherwise described throughout the specification, technical terms are used to address specific embodiments, and are not intended to limit the present invention.

Also, singular forms include plural forms unless they have explicitly contrary meanings.

Further, the term "comprising" specifies properties, areas, integers, steps, operations, elements, or ingredients, but does not exclude addition of other properties, areas, integers, steps, operations, elements, or ingredients.

As used herein, terms including an ordinal such as "a first" or "a second" and the like may be used to explain various constitutional elements, but the constitutional elements are not limited thereto. The terms are used only to distinguish one constitutional element from another constitutional element. For example, a first constitutional element may be named a second constitutional element, and similarly, a second constitutional element may be named a first constitutional element, without departing from the right scope of the invention.

Hereinafter, embodiments of the invention will be explained in detail so that a person having ordinary knowledge in the art may easily practice it. However, the present invention may be specified in various forms, and is not limited to the examples.

The inventors, during studies on solar cells, confirmed that when a semiconductor substrate wherein via-holes surrounded by a side wall having an inclined plane, for example, tapered via-holes are formed is used, ion implantation may be applied for the preparation of an emitter wrap through type of solar cell, and thus, a high efficiency back-contact type of solar cell may be prepared by a more simplified method, and completed the invention.

Specifically, compared to a diffusion method that is applied for the formation of an emitter layer, an ion implantation method can closely control the implantation depth, distribution, composition of impurities, and the like, and allows formation of a selective emitter, and the like, and thus it is being applied for the preparation of a solar cell of a conventional structure having an electrode on the front side. However, since an emitter wrap through type of solar cell uses a semiconductor substrate having multiple via-holes, it is difficult to apply the ion implantation method for the doping process of impurities. Specifically, if an ion implantation method using direct driving ion-beams is applied on a semiconductor substrate having via-holes of a cylindrical shape with substantially identical cross-sectional areas, it is difficult to dope impurities on the wall surface of the via-holes, as shown in Fig. 1 .

To overcome the limitation, as shown in Fig. 2, a method of applying ion implantation for the preparation of an emitter wrap through type of solar cell by controlling the angle of an ion beam or a semiconductor substrate has been suggested. However, this method should be conducted while controlling the angle at least twice during ion implantation, thus making the whole process complicated, and it is difficult to uniformly dope impurities on the wall surface of via-holes. For this reason, a heat diffusion method is mainly being applied for the formation of an emitter layer when preparing an emitter wrap through type of solar cell. From this aspect, as the method for preparing an emitter wrap through . type of solar cell according to the present invention forms via-holes on a semiconductor substrate so as to be surrounded by a side wall having an inclined plane on at least a part thereof (as a non-limiting example, so as to have a cross-sectional area that decreases from one side to the other side of the substrate), the wall surface of via-holes may be uniformly doped by conducting ion implantation once, as shown in Fig. 3 or Fig. 4.

As such, since the method for preparing an emitter wrap through type of solar cell according to the present invention uses a substrate having via-holes of the above-explained shape (for example, tapered via-holes), an ion implantation method may be applied for the formation of an emitter layer, and thus an edge isolation process may be omitted to simplify the preparation process, and it is advantageous for the formation of a shallow emitter, a selective emitter, and the like, thus providing a high efficiency back-contact type of solar cell.

For example, as shown in Fig. 5, by forming via-holes so that the diameter of the via-hole on the rear side of the substrate is larger than the diameter of the via-hole on the front side, and then doping at a low dose on the front side and at a high dose on the rear side of the substrate through ion implantation and activation, a high efficiency back-contact type of solar cell of a selective emitter structure having a high resistance emitter layer (31 ) and a low resistance emitter layer (33) may be prepared by a more simplified process.

According to one embodiment of the invention, a method for preparing an emitter wrap-through solar cell is provided, including:

preparing a first conductive type of semiconductor substrate having a front side facing the sun during normal operation and a rear side opposite to the front side; forming at least one via-hole that penetrates both sides of the substrate, and that is surrounded by a side wall having an incline plane on at least a part thereof;

forming a second conductive type of an emitter layer on both sides of the substrate and the wall surface of the via-hole by ion implantation;

forming a passivation layer on the front side and the rear side of the substrate; and

forming a first conductive type of base electrode and a second conductive type of emitter electrode on the rear side of the substrate.

Hereinafter, each step of the preparation method according to one embodiment will be explained in detail. However, the preparation method of one embodiment may be commonly applied for the preparation of back-contact type of solar cells using a semiconductor substrate having via-holes, such as MWA (metallization wrap around), MWT (metallization wrap through), EWT (emitter wrap through) type of solar cells, and the like, and for convenience, it will be explained with reference to an emitter wrap through type of solar cell.

First, a first conductive type of a semiconductor substrate having a front side facing the sun during normal operation and a rear side opposite to the front side is prepared.

The semiconductor substrate has a first conductive type, wherein the first conductive type is p-type or n-type, and a second conductive type described below refers to the opposite of the first conductive type. As a non- limiting example, the semiconductor substrate may be a p-type or n-type doped silicon wafer, preferably a p-type doped silicon wafer, and in addition, those common in the technical field to which the invention pertains may be applied without specific limitations.

The depth of the semiconductor substrate may be determined considering electrical performance and mechanical properties required for solar cells, and the like, and it is not specifically limited. However, for a non-limiting example, the depth of the semiconductor substrate may be 150 to 250 pm.

The front side of the semiconductor substrate is a side facing the sun during normal operation, and it may be textured so as to have an uneven structure to improve the absorption rate of incident sunlight. The uneven structure may have various forms including a regular inverted pyramid pattern. The texturing may be produced by wet etching or dry etching. As a non- limiting example, the wet etching may be conducted using an etchant composition including at least one alkali compound selected from the group consisting of potassium hydroxide, sodium hydroxide, ammonium hydroxide, tetra(hydroxymethyl)ammonium, and tetra(hydroxyethyl)ammonium. The etchant composition may include a cyclic compound having a boiling point of 100 °C or more, preferably 150 to 400 °C. The cyclic compound may be included in the content of 0.1 to 50 wt%, preferably 2 to 30 wt%, more preferably 2 to 10 wt%, based on total weight of the composition. The cyclic compound may improve wettability of a crystalline silicon surface to prevent overetching by the alkali compound, and it also functions to rapidly drop etched and dissolved hydrogen bubbles to prevent generation of a bubble stick phenomenon.

Meanwhile, the rear side of the semiconductor substrate is a side opposite to the front side, and a trench having an emitter electrode shape may be formed on the rear side to a predetermined depth, as necessary. The trench may be formed by any methods commonly used in the technical field to which the invention pertains, and preferably, it may be formed by grooving a grid line on the rear side of the substrate through laser grooving. Further, as a non-limiting example, the trench may be formed to a width of 200 to 700 pm and a depth of 20 to 60 pm. The depth and the width of each trench may be variously changed considering the width and the depth of an electrode formed inside of each trench, the effect of electrode isolation, the thickness of the substrate, and the like, and are not limited to the above range. Next, a step of forming at least one via-hole that penetrates both sides of the substrate and is surrounded by a side wall having an inclined plane on least a part thereof is conducted.

At least one via-hole is formed so as to penetrate through both sides of the substrate, and it becomes a passage connecting the front side of the substrate and the emitter electrode.

The via-hole may have a circular cross-section that is horizontal to both sides of the substrate.

Particularly, according to the one embodiment, the via-hole is surrounded by a side wall having an inclined plane on at least a part thereof. For a non-limiting example, as shown in Fig. 3, the whole via-hole may be surrounded by a side wall, and for another limiting-example, as shown in Fig. 4, the via-hole may have a stepwise side wall forming an inclined plane.

Specifically, the via-hole is surrounded by a side wall that is not perpendicular to both sides of the substrate, and preferably, the via-hole has a cross-sectional area in the horizontal direction to both sides of the substrate that decreases from one side to the other side of the substrate. The cross- sectional area of the via-hole may be continuously decreased from one side to the other side of the substrate (Fig. 3: tapered via-hole), or may be discontinuously decreased (Fig. 4: stepwise via-hole having an inclined plane). The tapered via-hole of Fig. 3 is one example wherein the cross-section in the perpendicular direction to both sides of the substrate forms a trapezoid, and the stepwise via-hole having an inclined plane of Fig. 4 is one example wherein the cross-section in the perpendicular direction to both sides of the substrate consists of two continuous trapezoids. However, the number of steps of the stepwise via-holes is not limited to the example of Fig. 4, and it may be formed of two or more steps.

As explained in the one embodiment, as the via-hole is surrounded by a side wall that is not perpendicular to both sides of the substrate, ion implantation that has been very limitedly applied in the preparation of an emitter wrap through type of solar cell may be applied, and the wall surface of the via- holes may be uniformly doped with impurities through ion implantation. Furthermore, filling efficiency of the emitter electrode forming material may be improved in the subsequent step.

Herein, the via-hole is not specifically limited in terms of the diameter and the like, as long as it satisfies the above-explained shape. However, for a non-limiting example, the via-hole may have a diameter of 20 to 200 pm on one side of the substrate, and it is advantageous in terms of the realization of the above effect and preparation efficiency for the ratio of the minimum diameter and the maximum diameter of the via-hole to be 1 :1.2 to 1 :10, preferably 1 :1.2 to 1 :5. According to one embodiment of the invention, the via-hole may have a tapered shape with a diameter of 80 pm on one side and a diameter of 40 pm on the other side.

Meanwhile, to form the via-hole, laser drilling, wet etching, dry etching, mechanical drilling, water jet machining, a combined process, or the like may be applied, and laser drilling may be advantageous in terms of process efficiency and accuracy improvement.

In case laser drilling is used, for the formation of the tapered via-hole as explained above, by locating the focus of a laser beam on the top side of the semiconductor substrate, one side to which laser beam may be relatively strongly irradiated is formed with large cross-sectional area, and the opposite side to which the laser beam is weakly irradiated may be formed with small cross-sectional area. At this time, it is preferable for smooth operation that an entry sheet or a backup sheet for laser processing is located on one side of the semiconductor substrate. The laser processing conditions may be modified according to the thickness of the substrate, the shape of via-holes, and the like, and it may be conducted while controlling energy of one shot, the location of the shot, the number of shots, total energy, and the like. As such, if the laser is used, thermal damage to the substrate may occur, and in this case, damage removal etching may be further conducted. This process is used to remove a damaged area such as a burr on the surface of the substrate, and as a non-limiting example, it may be conducted using an etchant composition including an alkali compound at a temperature of 70 to 00 °C for 1 to 10 minutes.

Next, as shown in Fig. 3 or Fig. 4, a second conductive type of emitter layer is formed on both sides of the substrate and the wall surface of the via- holes by ion implantation.

The ion implantation enables doping of impurities to a desired depth while controlling the concentration, and it may achieve good uniformity even at a low doping concentration.

The ion implantation may be conducted by the processes of wet cleaning, ion implantation, activation, and the like. Each process may be conducted according to methods and conditions commonly used in the technical field to which the invention pertains. However, according to one embodiment, ion implantation may be conducted without a separate mask for a front emitter, and it may be conducted using a mask for a rear emitter. Further, as an implantation source, a gas such as BF ₃ (11 B+, 49BF2+), PH ₃ (31 P+), AsH ₃ (75As+), and the like may be used. In addition, implantation energy of about 5 to 50 keV, preferably about 10 keV, may be used, and if necessary, implantation energy of 50 keV or more may be used. The activation may be progressed in a high temperature furnace or an RTP furnace, and the like. Next, a step of forming a passivation layer on the front side and the rear side of the substrate is conducted.

The passivation layer aids in decreasing loss of photogenerated carriers on the substrate, and decreasing electrical loss due to shunt currents.

The passivation layer is a dielectric layer on the substrate, and it may function to prevent escape of light received inside of the solar cell to the outside of the solar cell, and function to passivate surface defects acting as electron trap sites on the front side of the substrate.

The functions of the passivation layer may be exhibited by a single material or multiple different materials, and the anti-reflection layer may be a monolayered thin film or a multilayered thin film.

As non-limiting examples, the passivation layer may be a monolayered thin film or a multilayered thin film including at least one selected from the group consisting of a semiconductor oxide, a semiconductor nitride, a semiconductor oxide containing nitrogen, a semiconductor nitride containing hydrogen, AI ₂ O ₃ , MgF ₂ , ZnS, MgF ₂ , Ti0 ₂ , and CeO ₂ .

The passivation layer may be formed by a thin film forming method commonly applied in a semiconductor passivation process, and for example, it may be formed by physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), thermal evaporation, and the like, or it may be formed by a common printing process using ink or paste.

Next, a first conductive type of a base electrode and a second conductive type of an emitter electrode are formed on the rear side of the substrate.

The base electrode and the emitter electrode may be formed with common structures at common locations. For example, the emitter electrode may be formed by filling a composition for an emitter electrode in the via-holes and printing on certain areas covering the via-holes, and the base electrode may be formed by printing with a composition for a base electrode in a separated form from the emitter electrode. Preferably, each electrode may be interdigitated in a herring bone shape. As the composition for a base electrode, a composition including impurities affording a first conductive type, for a non- limiting example, an aluminum-based composition may be used. As the composition for an emitter electrode, a composition including impurities affording a second conductive type, for a non-limiting example, a silver-based composition may be used.

Meanwhile, the method for preparing a solar cell according to the one embodiment may further include commonly conducted processes before or after each step, other than the above-explained steps.

For example, before the step of forming a base electrode and an emitter electrode, steps of removing an emitter layer in the base electrode forming area, forming a passivation layer on the rear side of the substrate, and forming an anti-reflection layer on the front side of the substrate may be further conducted.

The selective removal process of an emitter layer may be conducted by coating an etch-resist on the area where an emitter layer is to be maintained, and treating the substrate with an etching solution to remove the emitter layer in the remaining area. For example, to remove an emitter layer in the base electrode forming area, the etch-resist may be coated on the front side of the semiconductor substrate, the wall surface of the via-hole, and the emitter electrode area, and the substrate may be treated with an etching solution so as etch to the depth of an emitter layer to be removed. Herein, the etch-resist may be formed by coating a resist composition by inkjet printing, masking, stenciling, screen printing, and the like. After removing the etch-resist by a common method, a step of washing the substrate using ammonia water, hydrogen peroxide, or a mixture thereof may be further conducted.

By the above method, a back-contact type of solar cell may be provided that includes a first conductive type of a semiconductor substrate having at least one tapered via-hole, a second conductive type of an emitter layer that is formed by ion implantation, an anti-reflection layer formed on the front side of the substrate, a passivation layer formed on the rear side of the substrate, and a base electrode and an emitter electrode that are formed on the rear side of the substrate. Hereinafter, preferable examples are presented for complete understanding of the invention. However, these examples are only to illustrate the invention, and the invention is not limited thereto.

Example: Preparation of EWT solar cell

Multiple via-holes having a tapered shape (with a diameter of about 80 pm on one side and a diameter of about 40 pm on the other side) were formed on a p-type doped silicon wafer (thickness of about 180 pm) using a laser drilling machine (Nd:YAG laser). At this time, the focus of the laser beam was located on the top side of the silicon wafer, so as to form tapered via-holes as shown in Fig. 3. Subsequently, using the laser drilling apparatus, a trench that including the via-hole formed area and having a herring bone structure (namely, the shape of an emitter layer) was formed (width about 400 pm, depth about 60 Mm).

Further, by ion implantation (source BF ₃ gas, implantation energy about 10 keV), an emitter layer was formed simultaneously on both side of the silicon wafer and the wall surface of the via-holes.

Subsequently, on the rear side of the wafer, an emitter layer in the area where a base electrode is to be formed was selectively removed. Specifically, an etch-resist was screen printed on the area other than a base electrode forming area, and the wafer was dipped in a composition containing hydrofluoric acid for about 3 minutes to remove the emitter layer. The wafer was then dipped in an organic solvent containing alcohol such as methanol and ethanol, and the like, for about 1 hour to remove the etch-resist.

Subsequently, silicon nitride films were formed on both sides of the wafer to a thickness of about 80 nm by plasma deposition (using a mixed gas of SiH ₄ and NH ₃ , deposition time about 200 seconds). An aluminum-based paste was then printed on the rear side of the wafer to a width of about 400 pm to form a base electrode, and a silver-based paste was printed in the via-holes and in the trench to a width of about 200 pm to form an emitter electrode.