Title:
METHOD FOR PRODUCING SOLID ELECTROLYTIC CAPACITOR
Document Type and Number:
WIPO Patent Application WO/2023/167229
Kind Code:
A1
Abstract:
According to the present invention, a through-hole for a positive electrode is formed so as to penetrate a flat film-type capacitor element in the thickness direction. A plurality of flat film-type capacitor elements are stacked in a position such that the through-holes for the positive electrode overlap. Compression molding is performed, in which an insulating resin having fluidity and the sheet stack are disposed between an upper die and a lower die, the upper die and the lower die are fitted together, and heat and pressure are applied. The distance between the upper die and the lower die when the upper die and the lower die are fitted together is greater than the thickness of the sheet stack.
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Inventors:
MANO KYOTARO (JP)
ONISHI WATARU (JP)
ONISHI WATARU (JP)
Application Number:
PCT/JP2023/007509
Publication Date:
September 07, 2023
Filing Date:
March 01, 2023
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H01G9/00; H01G2/10; H01G4/30; H01G9/048; H01G9/15
Domestic Patent References:
| WO2021261351A1 | 2021-12-30 |
Foreign References:
| JP2020167196A | 2020-10-08 | |||
| JP2018198298A | 2018-12-13 | |||
| JPH06334109A | 1994-12-02 | |||
| JPH06210638A | 1994-08-02 | |||
| JP2019079866A | 2019-05-23 | |||
| JP2020102651A | 2020-07-02 |
Attorney, Agent or Firm:
KAEDE PATENT ATTORNEYS' OFFICE (JP)
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