Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
METHOD, SYSTEM, AND PROGRAM FOR CACHE COHERENCY CONTROL
Document Type and Number:
WIPO Patent Application WO/2012/070291
Kind Code:
A1
Abstract:
To be achieved in the present invention is a cache coherency control, wherein scalability of a shared-memory type multiprocessor system is improved, and cost-performance is improved by restraining the cost of hardware and software. In a system for controlling cache coherency of a multi-processor system wherein a plurality of processors comprising caches and TLBs share system memory, each of the processors comprises a TLB control unit further comprising: a TLB searching unit for executing TLB searching; and a coherency handler for executing registration information processing of the TLB, when no hit is obtained in the TLB searching and a TLB interruption is generated. The coherency handler comprises: a TLB replacement handler for executing a search of a page table of the system memory, and registration information replacement of the TLB; a TLB-mistake exception handling unit for handling a TLB-mistake interruption, which occurs when the TLB interruption is not caused by a page fault, but registration information that matches the address does not exist in the TLB; and a storage exception handling unit for handling a storage interruption, which occurs when registration information that matches the address exists in the TLB, but accessing authority is infringed.

Inventors:
UEDA MAKOTO (JP)
Application Number:
PCT/JP2011/070116
Publication Date:
May 31, 2012
Filing Date:
September 05, 2011
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
IBM (US)
UEDA MAKOTO (JP)
International Classes:
G06F12/08; G06F12/10
Foreign References:
JP2004326798A2004-11-18
JPH06236353A1994-08-23
JPH06187241A1994-07-08
JP2001142780A2001-05-25
JPH04306750A1992-10-29
Other References:
AKIRA FUKUDA, HEIRETSU OPERATING SYSTEM, 20 May 1997 (1997-05-20), pages 105 - 165
BRYAN S. ROSENBURG: "Low-Synchronization Translation Lookaside Buffer Consistency in Large-Scale Shared-Memory Multiprocessors", SOSP'89 PROCEEDINGS OF THE TWELFTH ACM SYMPOSIUM ON OPERATING SYSTEMS PRINCIPLES, 1989, pages 137 - 146
Attorney, Agent or Firm:
UENO Takeshi et al. (JP)
Tsuyoshi Ueno (JP)
Download PDF:
Claims: