Title:
MULTILAYER CERAMIC CAPACITOR, PACKAGE AND CIRCUIT BOARD
Document Type and Number:
WIPO Patent Application WO/2024/014434
Kind Code:
A1
Abstract:
With respect to a multilayer ceramic capacitor according to the present invention, the dimension in a first axis direction is not less than 1.5 times the dimension in a second axis direction that is orthogonal to the first axis; and this multilayer ceramic capacitor is mounted on a mounting surface that is perpendicular to the first axis. This multilayer ceramic capacitor comprises a ceramic element and an external electrode. The ceramic element has: a pair of main surfaces that are perpendicular to the first axis; a pair of lateral surfaces that are perpendicular to the second axis; an end face that is perpendicular to a third axis that is orthogonal to the first and second axes; a multilayer body that comprises a plurality of internal electrodes which are stacked in the second axis direction and are led out to an connection end on the end face; and a pair of margin parts that cover the multilayer body from both sides in the first axis direction and have a higher grain growth inhibiting element concentration than the multilayer body. The external electrode covers the end face.
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Inventors:
SHIROTA AYUMI (JP)
Application Number:
PCT/JP2023/025485
Publication Date:
January 18, 2024
Filing Date:
July 10, 2023
Export Citation:
Assignee:
TAIYO YUDEN KK (JP)
International Classes:
H01G4/30
Foreign References:
JP2020035788A | 2020-03-05 | |||
JPS5671919A | 1981-06-15 | |||
JP2021103767A | 2021-07-15 | |||
JP2021136375A | 2021-09-13 | |||
JP2022020803A | 2022-02-01 | |||
JP2019201134A | 2019-11-21 |
Attorney, Agent or Firm:
KATAYAMA, Shuhei (JP)
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