NEUROCOMPUTER - FUJITSU LTD

Title:

NEUROCOMPUTER

Document Type and Number:

WIPO Patent Application WO/1990/002381

Kind Code:

A1

Abstract:

A hierarchical or feedback neural network is formed by subjecting time sharing analog input signals and weight data, which are inputted sequentially via analog signal buses, to sum/product operation, and using an analog neuron processor (ANP) adapted to output a signal to the analog signal buses through a non-linear circuit. The neural network is controlled by reading required control data from a control pattern memory and required weight data from a weight memory under the control of a microsequencer, to obtain a practically operable neurocomputer. In this neurocomputer, a plurality of ANPs are connected by one analog bus. This enables the number of wires in the neural network to be reduced greatly and the scale of the circuit to be minimized. In a plurality of ANPs in one layer, analog signals are inputted simultaneously via the analog buses, and parallel computation is carried out in the same time section. In ANPs in different layers, the computation is carried out in parallel, so that the computation speed is increased. Therefore, the present invention can provide a highly practical neurocomputer.

Inventors:

YOSHIZAWA HIDEKI (JP)
ICIKI HIROKI (JP)
KATO HIDEKI (JP)
SUGIURA YOSHIHIDE (JP)
ASAKAWA KAZUO (JP)
TSUZUKI HIROYUKI (JP)
ENDO HIDEICHI (JP)
KAWASAKI TAKASHI (JP)
MATSUDA TOSHIHARU (JP)

Application Number:

PCT/JP1989/000192

Publication Date:

March 08, 1990

Filing Date:

February 23, 1989

Export Citation:

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Assignee:

FUJITSU LTD (JP)

International Classes:

G06G7/60; G06N3/04; G06N3/063; (IPC1-7): G06G7/60

Foreign References:

JPS62295188A	1987-12-22
JPH05121749A	1993-05-18

Other References: