Title:
PACKAGING METHOD FOR SEMICONDUCTOR STRUCTURE, PACKAGING STRUCTURE, AND CHIP
Document Type and Number:
WIPO Patent Application WO/2022/068153
Kind Code:
A1
Abstract:
A packaging method for a semiconductor structure, a packaging structure, and a chip. The packaging method for a semiconductor structure comprises: forming a semiconductor structure on an SOI wafer; depositing, by means of plasma-enhanced chemical vapor deposition (PECVD), silicon oxide on the surface of the semiconductor structure provided with a trench opening; and performing a subsequent packaging process. By sealing a trench opening of a semiconductor structure by using the characteristic of low step coverage of PECVD, the problem of device failures caused by trench blocking due to subsequent filling of a packaging material is solved.
Inventors:
TANG BO (CN)
YANG YAN (CN)
ZHANG PENG (CN)
LI ZHIHUA (CN)
LIU RUONAN (CN)
SUN FUJUN (CN)
HUANG KAI (CN)
LI BIN (CN)
XIE LING (CN)
WANG WENWU (CN)
YANG YAN (CN)
ZHANG PENG (CN)
LI ZHIHUA (CN)
LIU RUONAN (CN)
SUN FUJUN (CN)
HUANG KAI (CN)
LI BIN (CN)
XIE LING (CN)
WANG WENWU (CN)
Application Number:
PCT/CN2021/081449
Publication Date:
April 07, 2022
Filing Date:
March 18, 2021
Export Citation:
Assignee:
INST OF MICROELECTRONICS CAS (CN)
International Classes:
G02B6/132
Foreign References:
| CN112285828A | 2021-01-29 | |||
| CN104716055A | 2015-06-17 | |||
| CN111508834A | 2020-08-07 | |||
| CN103072941A | 2013-05-01 | |||
| US20180269338A1 | 2018-09-20 |
Attorney, Agent or Firm:
UNITALEN ATTORNEYS AT LAW (CN)
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