Title:
PREPREG, LAMINATED PLATE, PRINTED WIRING BOARD, AND SEMICONDUCTOR PACKAGE
Document Type and Number:
WIPO Patent Application WO/2024/024850
Kind Code:
A1
Abstract:
Provided is a prepreg capable of developing dimensional stability of a substrate (laminated plate). Also provided are a laminated plate, a printed wiring board, and a semiconductor package obtained using the prepreg. Specifically, provided are a prepreg and the like, the prepreg having one fibrous base material and a thermosetting resin composition or a semicured product thereof, wherein the thermosetting resin composition contains a thermosetting resin (A) and an inorganic filler (B), and the prepreg has a highly filled region in which the content of the inorganic filler (B) is 45% by volume or more and a poorly filled region in which the content of the inorganic filler (B) is less than 45% by volume.
More Like This:
Inventors:
KOBAYASHI YUZURU (JP)
KOTAKE TOMOHIKO (JP)
KOTAKE TOMOHIKO (JP)
Application Number:
PCT/JP2023/027415
Publication Date:
February 01, 2024
Filing Date:
July 26, 2023
Export Citation:
Assignee:
RESONAC CORP (JP)
International Classes:
B29B11/16; B32B5/28; B32B15/08; C08K3/013; C08K7/02; C08L101/00; H05K1/03
Foreign References:
| JP2015086293A | 2015-05-07 | |||
| JP2003236868A | 2003-08-26 | |||
| JP2021187890A | 2021-12-13 | |||
| JPS62256642A | 1987-11-09 |
Attorney, Agent or Firm:
OHTANI PATENT OFFICE (JP)
Download PDF: