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Title:
PRIORITY ENCODER FOR A CONTENT ADDRESSABLE MEMORY SYSTEM
Document Type and Number:
WIPO Patent Application WO1998054725
Kind Code:
A3
Abstract:
A priority encoder for generating a priority-encoded address which identifies the highest priority request line. According to one priority scheme, the active request line having the lowest address has the highest priority. The priority encoder is capable of generating the priority-encoded address by determining information corresponding to the most significant bits of the priority-encoded address and using this information in the computation of less significant bits of the priority-encoded address. Using purely combinatorial logic, including switch elements, the priority encoder is capable of computing lower order bits using feedback signals resulting from the computation of higher order bits, allowing successive computation of priority-encoded address bits, without necessitating the use of clocks or delay elements.

Inventors:
SRINIVASAN VARADARAJAN
MEHTA KETAN K
GALA SANJAY V
SHAH RUCHIR P
Application Number:
PCT/US1998/011519
Publication Date:
March 11, 1999
Filing Date:
May 29, 1998
Export Citation:
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Assignee:
QUALITY SEMICONDUCTOR INC (US)
International Classes:
G11C15/00; (IPC1-7): G11C/
Foreign References:
US5726942A1998-03-10
US5555397A1996-09-10
US5467319A1995-11-14
US5440715A1995-08-08
US5394353A1995-02-28
US5123105A1992-06-16
US5053991A1991-10-01
US4928260A1990-05-22
US4887084A1989-12-12
US4348741A1982-09-07
US4334288A1982-06-08
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