Title:
RECEIVER
Document Type and Number:
WIPO Patent Application WO/2014/091791
Kind Code:
A1
Abstract:
A receiver (1) has receiving systems (100, 200) and an adder (20). The receiving systems (100, 200) include first stage local oscillators (120, 220), quadrature demodulators (110, 210), first stage filter pairs (130, 230), second stage local oscillators (150, 250), quadrature modulators (140, 240), and second stage filters (160, 260). A passband frequency of each of the first stage filter pairs (130, 230) and the second stage filters (160, 260) is set in such a manner that a bandwidth at or above a modulation bandwidth (BMOD) of a desired wave is regarded as an intermediate frequency (IF) signal bandwidth (BIF), which is a modulation bandwidth of a first stage signal. A center frequency (fIFP1) of the first stage IF signal is set in such a manner as to be higher than a center frequency (fIFS1) of a second stage IF signal by at least the IF signal bandwidth (BIF), and a center frequency (fIFP2) of the second first stage IF signal is set in such a manner as to be lower than a center frequency (fIFS2) of the first stage IF signal by at least the IF signal bandwidth (BIF).
Inventors:
SUZUKI HIROSHI (JP)
IMAO MASATAKA (JP)
FUJIWARA TAKASHI (JP)
IMAO MASATAKA (JP)
FUJIWARA TAKASHI (JP)
Application Number:
PCT/JP2013/070558
Publication Date:
June 19, 2014
Filing Date:
July 30, 2013
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
H04L27/38; H04B1/10; H04B1/26
Foreign References:
| JP2010183257A | 2010-08-19 | |||
| JP2009239407A | 2009-10-15 | |||
| JP2001007780A | 2001-01-12 | |||
| JP2007081798A | 2007-03-29 | |||
| JP2006115005A | 2006-04-27 | |||
| US20100197252A1 | 2010-08-05 |
Attorney, Agent or Firm:
MAEDA Minoru et al. (JP)
Minoru Maeda (JP)
Minoru Maeda (JP)
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