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Title:
SEMICONDUCTOR CHIP AND SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2007/077849
Kind Code:
A1
Abstract:
Provided is a semiconductor chip which can be mounted on an interposer. The semiconductor chip has a minimum pitch interval of 100μm or less. The semiconductor chip is provided with a plurality of electrodes for connecting a wiring in the interposer with a wiring in the semiconductor chip; a plurality of probe electrodes connected to a part of the electrodes; a dividing means for dividing a test signal inputted to the probe electrodes and supplying the divided signals to the wiring which is in the semiconductor chip and connected with the electrodes; and a signal processing means for performing prescribed signal processing based on the test signal divided by the dividing means.

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Inventors:
KUMAGAI KOICHI (JP)
Application Number:
PCT/JP2006/325981
Publication Date:
July 12, 2007
Filing Date:
December 26, 2006
Export Citation:
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Assignee:
SYSTEM FABRICATION TECHNOLOGIE (JP)
KUMAGAI KOICHI (JP)
International Classes:
G01R31/28
Foreign References:
JPH01227973A1989-09-12
JPH08335615A1996-12-17
JP2005156479A2005-06-16
JPH02117167A1990-05-01
JPH07167918A1995-07-04
JPH1082834A1998-03-31
Attorney, Agent or Firm:
NAKAJIMA, Jun et al. (NAKAJIMA & KATO Seventh Floor, HK-Shinjuku Bldg., 3-17, Shinjuku 4-chome, Shinjuku-k, Tokyo 22, JP)
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