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This invention relates to the field of semiconduc or devices. R _, £k round_o£_£he__ nve_n M^n

Integrated circuits require metallizations to connect the various individual devices within the integrated circuit. As both the complexity and the number of devices in the integrated circuits increase, the dimensions of the lines forming the interconnections, i.e. , me allizations, generally decrease as does the spacing between the lines. Although there are often problems associated with the integrity of the lines, these problems become still more severe in very iarge scale integration (VLSI) due to the very small dimensions of the 1 ine s .

Aluminum is frequently the preferred -metalliz tion because of its relatively low resistivity and its compatibility with doped silicon. There is the potential for at least four problems to arise from the use of the aluminum. First, aluminum is not a very hard metal and it is possible to scratch the metal before it has been passivated. Second, el ec romigrat ion of atoms within the lines is possible. El ectromigrat ion potentially leads to electrical discontinuities in the line. This problem can be alleviated, and perhaps solved, by depositing the aluminum in a bamboo type structure which stops the e1 ectromigrat ion. See U. S. Patent 4,438,450 issued on March 20, 1984. Third, for many applications, it is desirable to deposit the me allization over discontinuities or steps in the physical surface while retaining electrical continuity. This is often difficult to realize with conventional deposition techniques.

Fourth, the aluminum lines may develop either or both lateral or vertical hillocks. The development of hillocks is undesirable because it may make further fabrication steps difficult because the lines no longer have their desired geometry.

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This invention relates to semiconductor devices having improved metalliz tions. A plurality of metal, e.g. ,. aluminum, conductors is formed on a surface o-ve-r:_Lying a silicon substrate, or an overlying dielectric llayβϊrv and an electrically conducting refractory material is then selectively deposited, by low temperature chemical vapor deposition, on the exposed surfaces of the conductors. The resulting semiconductor device thus comprises a silicon substrate, a dielectric layer on said substrate, a plurality of aluminum conductors on the surface and a refractory material which covers the exposed aluminum surfaces to form an encapsulated bimetallic structure. It will be appreciated that the term bimetallic is thus not limited to structures with a first metal layer directly on top of a second metal layer. In a particular embodiment, the refractory material comprises tungsten. Refractory materials deposited by the method of this invention can also be used to coat metals used within windows or plugs. Use of bimetallic metalliz tions according to this invention is also contemplated for multilevel interconnections. M£ _. i≤ _, ^_De.s.£ri£ _, i _, on_p_f__ihe _, _D£a i _, n^

FIG. 1 is a vie» of one embodiment of a device according to this invention;

FIG. 2 is a vi w of another embodiment of a device according to this invention.

FIG. 3 illustrates an aspect of this invention; FIG. 4 is a view of another embodiment of this invention; and

FIG. 5 illustrates an aspect of this invention.

For reasons of clarity, elements of the devices depicted are not drawn to scale.

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FIG. 1 is a schematic view of device according to this invention. It comprises a silicon substrate 1, a dielectric layer 3 and a plurality of aluminum conductors, i.e. , metallizations, 5 on the top major surface. There are holes 7 in the dielectric to the silicon substrate. As depicted, the aluminum metallizations are on both the surface of the dielectric, and in the holes 7 which have been coated, but not totally filled, with aluminum. As can be seen, the aluminum conductors have exposed surfaces, i.e. , surfaces which do not contact the silicon substrate or the dielectric material. Deposited on the exposed surfaces of the aluminum are refractory material coatings 9. As can be seen, the refractory material covers the exposed surfaces of the aluminum runners on the dielectric as well as the three exposed surfaces of the aluminum within the holes. ' It is understood by those skilled in the art that the aluminum is used to electrically contact devices which form the individual components of the integrated circuit but are not shown for reasons of clarity. The structures depicted comprise aluminum features which are covered on their otherwise exposed surfaces by conducting refractory material. These structures are conveniently referred to as encapsulated bimetallic structures.

The bimetallic structures are conveniently formed by a low temperature chemical vapor deposition process. It is noted that the selective deposition of the refractory material proceeds, and encapsulates the aluminum on three sides, without a lithographic step. Low temperatures are desirably used as they do not lead to hillock formation. The method will be described by explicit reference to the deposition of tungsten on aluminum. After appropriate processing, a dielectric layer is deposited on the silicon and patterned as

desired. An aluminum layer is then deposited and patterned. Tungsten is now deposited. Typical constituents for the chemical vapor deposition of tungsten are hydrogen and WT, . The resulting reaction leads to the deposition of tungsten on the exposed aluminum surfaces. It is believed that the reaction proceeds more expedi tiously through a surface activation mechanism with aluminum and within a restricted temperature range proceeds selectively, i.e., only on the exposed aluminum surfaces. Therefore, there is little or no deposition of the refractory material on unwanted surfaces.

It has been found that temperatures within the range from approximately 280 to 350 degrees C are desirable. Temperatures below 280 degrees C may be used but the deposition rate becomes undesirably slow.

Temperatures above 350 degrees are undesirable because hillocks may begin to form. On lμ thick Al runners, a deposition' temperature between 280 and 300 degrees C was used. The flow rates were 10-1 ^* 20 and 3000 cc/min for ¥F, and H_ , respectively. The pressure was approximately 66 .6 pascal. Deposition times between 15 and 30 minutes resulted in tungsten thicknesses between 50 and 100 nm. The remainder of the processing sequence is similar to a conventional processing sequence through the contact bake, final in process and passivation steps.

The thickness of the tungsten is desirably bet-ween 50 and 100 nm although the precise thickness is not critical. As twice the thickness of tungsten is deposited in the space between lines, thick films may lead to shorting between finely spaced lines. It will also be appreciated that the lines are both wider and closer together than they were before the tungsten was deposited. The narrower spacing was obtained without either etching or lithography. In addition to the deposition of tungsten, deposition of other materials is contempl ted. For example. Mo, Ta or Ti may be deposited on the aluminum

surfaces. Use of conductors other than pure aluminum is also contempl ted. For example, the presence of other elements, e.g. , silicon, in minor amounts is contempla ed. Use of Al based alloys is also contemplated. Also, use of other metals, e.g.. Mo, is contempl ted. Additionally, the bimetallic structure may comprise two layers of the same metal but with different grain structure. For example, sputtered tungsten might be deposited first followed by chemical vapor deposition of tungsten. Multilevel interconnects are also contemplated.

A schematic represent tion of a multilevel interconnect is depicted in FIG. 2. Numerals identical to those used in FIG. 1 represent identical elements. In addition the structure previously depicted, a second dielectric layer 11 is also present and has a plurality of openings 13 which expose a surface of refractory material 9. That is, the second dielectric layer has been patterned. Deposited on' refractory material 9 is- a layer of aluminum 15 which, in turn, is covered'on its exposed. surface s by a layer of refractory material 17. Special attention is drawn to the top right end where covering of the end surface of the aluminum is clearly depicted.

The refractory material is typically the same as that used for the previous layer of refractory material and is deposited by an identical technique. The dielectric materials are typically glass.

The etch used to pattern the aluminum etches the aluminum but not the refractory material. There is thus significantly greater tolerances, as correspond to prior art devices, in aligning connecting aluminum lines as there is no danger of the etch removing the first level metallization. FIG. 3 shows a structure having a first level metallization 31, dielectric 33 and second level metallization 35. If, as in prior art structures, both met llizations were aluminum, etching the second met llization would also result in etching the first level metalliz tion. However, the refractory material in the

first metallization stops the etch. A top view of a two level interconnection is depicted in FIG. 4. The first level metallization is 41, the second level metallization 43, and they are connected via window 45. Another view of the encapsulated structure is shown in FIG. 5. There is a dielectric layer 51 and three encapsulated bimetallic structures on layer 51. Each structure comprises a first conductor 53 and a conducting refractory material 55 which covers the exposed surfaces of the conductor to form the encapsulated structure. As can be seen, the tolerances for the overlay of crossing lines are greatly increased.