Title:
SEMICONDUCTOR MEMORY DEVICE HAVING A FERROELECTRIC CAPACITOR AND A MANUFACTURING METHOD THEREOF
Document Type and Number:
WIPO Patent Application WO2003107425
Kind Code:
A3
Abstract:
In a TC parallel unit series connected ferroelectric memory, an interlayer insulating film (15, 16) is formed on a semiconductor substrate (11) to cover first and second semiconductor regions (12) and a gate electrode (14). First and second lower electrodes (18A, 18B) of ferroelectric capacitors are formed on the interlayer insulating film (16). A first contact plug (21A) is formed in the interlayer insulating film in contact with the first lower electrode. A second contact plug (21B) is formed in the interlayer insulating film in contact with the second lower electrode. First and second contact plugs are connected to a buried interconnection (22) which is connected to one of said semiconductor regions by a third contact plug (23). In another embodiment, first to third contact plugs and the buried interconnection are replaced by a single contact plug (36).
Inventors:
KANAYA HIROYUKI
HILLIGER ANDREAS
HILLIGER ANDREAS
Application Number:
PCT/JP2003/007431
Publication Date:
April 22, 2004
Filing Date:
June 11, 2003
Export Citation:
Assignee:
TOSHIBA KK (JP)
INFINEON TECHNOLOGIES AG (DE)
INFINEON TECHNOLOGIES AG (DE)
International Classes:
H01L21/8246; H01L27/105; H01L27/115; H01L21/8242; (IPC1-7): H01L27/115; H01L21/8246
Foreign References:
| US20020000585A1 | 2002-01-03 | |||
| US20020038402A1 | 2002-03-28 |
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