SYSTEMS AND METHODS FOR PREVENTING DATA REMANENCE IN MEMORY SYSTEMS

Title:

SYSTEMS AND METHODS FOR PREVENTING DATA REMANENCE IN MEMORY SYSTEMS

Document Type and Number:

WIPO Patent Application WO/2012/148743

Kind Code:

A3

Abstract:

Methods, circuits, and systems for preventing data remanence in memory systems are provided. Original data is stored in a first memory, which may be a static random access memory (SRAM). Data is additionally stored in a second memory. Data in the first memory is periodically inverted, preventing data remanence in the first memory. The data in the second memory is periodically inverted concurrently with the data in the first memory. The data in the second memory is used to keep track of the inversion state of the data in the first memory. The original data in the first memory can be reconstructed performing a logical exclusive-OR operation between the data in the first memory and the data in the second memory.

Inventors:

PEDERSEN BRUCE B (US)
REESE DIRK A (US)

Application Number:

PCT/US2012/033997

Publication Date:

January 03, 2013

Filing Date:

April 18, 2012

Export Citation:

Click for automatic bibliography generation Help

Assignee:

ALTERA CORP (US)
PEDERSEN BRUCE B (US)
REESE DIRK A (US)

International Classes:

G11C7/10; G11C7/20; G11C11/41

Foreign References:

US7567467B2	2009-07-28
US20060023486A1	2006-02-02
US20080244182A1	2008-10-02
US20100138619A1	2010-06-03

Other References: