Title:
TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
Document Type and Number:
WIPO Patent Application WO/1998/010469
Kind Code:
A1
Abstract:
A transistor which is reduced in turn-on voltage and shortened in turn-off time. Its manufacturing method is also disclosed. A first emitter layer (4) and a second emitter layer (5) are separately and selectively formed on the surface of a base layer (3) and a channel area (6) which faces to a gate electrode (8) through a gate insulating film (7) is formed between the layers (4 and 5). When the transistor is on, a base current I�b? is supplied from a base electrode (11), and a prescribed gate voltage is applied to the electrode (8). Since the layers (4 and 5) are connected to each other and act as a single emitter layer, the turn-on voltage of the transistor is a low value nearly equal to that of a bipolar transistor. At the time of turning off the transistor, the supply of the base current I�b? is stopped and a zero (or negative) voltage is applied to the electrode (8). As a result, the layers (4 and 5) are isolated from each other and a second collector current I�c2? which is the component of the main current flowing through the layer (5) is abruptly attenuated to a small value which is nearly equal to that of a MOS.
More Like This:
Inventors:
TAKAHASHI HIDEKI (JP)
Application Number:
PCT/JP1996/002557
Publication Date:
March 12, 1998
Filing Date:
September 06, 1996
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP (JP)
TAKAHASHI HIDEKI (JP)
TAKAHASHI HIDEKI (JP)
International Classes:
H01L29/739; (IPC1-7): H01L29/78
Foreign References:
| JPH05190561A | 1993-07-30 | |||
| JPS6185866A | 1986-05-01 | |||
| JPS6022358A | 1985-02-04 | |||
| JPS61207066A | 1986-09-13 | |||
| JPS59149056A | 1984-08-25 | |||
| JPH02202063A | 1990-08-10 |
Other References:
See also references of EP 0860883A4
Attorney, Agent or Firm:
Yoshida, Shigeaki (10th floor 4-70, Shiromi 1-chome, Chuo-k, Osaka-shi Osaka 540, JP)
Download PDF: