TRANSMISSION LINE SUBSTRATE AND SEMICONDUCTOR PACKAGE

Title:

TRANSMISSION LINE SUBSTRATE AND SEMICONDUCTOR PACKAGE

Document Type and Number:

WIPO Patent Application WO/2006/001388

Kind Code:

A1

Abstract:

A transmission line substrate comprising a spurious wave suppressing circuit (50) including a distributor (51) for distributing the signal line of a drive control signal connected with a semiconductor device to two signal lines of equiphase, a delay unit (52) connected with one distributed signal line and provided with a signal line having a length equal to about 1/2 of the effective wavelength of a spurious wave in the substrate, parallel two wire lines (53) connected with the delay unit (52) and the other signal line and provided with two parallel signal lines where the phase of the spurious wave is reversed, a resistor (55) arranged on the parallel two wire lines (53) and connecting the two parallel signal lines, and a combiner (54) having a signal line for combining the two signal lines of the parallel two wire lines (53) and outputting a combined signal. Leakage of a spurious wave component to the outside is blocked in a high frequency package and the spurious wave is absorbed while damping power efficiently without having adverse effect on the transmission characteristics, e.g. a required DC bias voltage, a control signal, and the like.

Inventors:

SUZUKI TAKUYA (JP)
FURUYA TERUO (JP)

Application Number:

PCT/JP2005/011649

Publication Date:

January 05, 2006

Filing Date:

June 24, 2005

Export Citation:

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Assignee:

MITSUBISHI ELECTRIC CORP (JP)
SUZUKI TAKUYA (JP)
FURUYA TERUO (JP)

International Classes:

H01P3/02; H01L23/12; H01P1/22; H01P5/08; (IPC1-7): H01P3/02; H01L23/12; H01P1/22; H01P5/08

Foreign References:

JP2004056441A	2004-02-19
JPH03113506U	1991-11-20
JP2003204203A	2003-07-18
JPH05110301A	1993-04-30
JPH06334431A	1994-12-02

Other References: