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Title:
COMPUTATION DEVICE, PRODUCT-SUM OPERATION SYSTEM, AND SETTING METHOD
Document Type and Number:
Japanese Patent JP2020126427
Kind Code:
A
Abstract:
To provide a computation device, etc., which can detect the result of product-sum operation with good accuracy.SOLUTION: The computation device comprises a plurality of input lines and a plurality of product-sum operation devices. An electric signal corresponding to an input value is inputted to the plurality of input lines within a prescribed input period. The multiplication units of the product-sum operation devices include at least one of a positive load multiplication unit for generating a positive load charge that corresponds to a multiplication value made by multiplying the input value by a positive load value and a negative load multiplication unit for generating a negative load charge that corresponds to a multiplication value made by multiplying the input value by a negative load value, and are constituted so that the ratio of the sum total of positive load values to the sum total of absolute values of load values is any ratio in a range of 0% to 100%. The output units of the product-sum operation devices accumulate at least one of the positive load charge generated by the positive load multiplication unit and the negative load charge generated by the negative load multiplication unit and thereby output a product-sum signal that represents the sum of multiplication values. The length of the input period is set on the basis of the distribution of positive load ratios of the plurality of product-sum operation devices.SELECTED DRAWING: Figure 12

Inventors:
YOSHIDA HIROSHI
Application Number:
JP2019018104A
Publication Date:
August 20, 2020
Filing Date:
February 04, 2019
Export Citation:
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Assignee:
SONY CORP
International Classes:
G06F7/48; G06N3/063
Attorney, Agent or Firm:
Junichi Omori
Mitsuru Takahashi
Teppei Nakamura
Ori Akira
Masayoshi Sekine
Ayako Kaneko
Shintaro Kanayama
Chiba Ayako
Shiraka Tomohisa