Title:
半導体チップ及びその製造方法
Document Type and Number:
Japanese Patent JP4250154
Kind Code:
B2
Abstract:
A semiconductor chip includes a semiconductor substrate 11, a through via 12 provided in a through hole 17 that passes through the semiconductor substrate 11, insulating layers 21-1 to 21-3 laminated on the semiconductor substrate 11, a multi-layered wiring structure 14 having a first wiring pattern 22 and a second wiring pattern 23, and an external connection terminal 15 provided on an uppermost layer of the multi-layered wiring structure 14, wherein the through via 12 and the external connection terminal 15 are connected electrically by the second wiring pattern 23.
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Inventors:
Kei Murayama
Mitsutoshi Toko
Mitsutoshi Toko
Application Number:
JP2005191407A
Publication Date:
April 08, 2009
Filing Date:
June 30, 2005
Export Citation:
Assignee:
Shinko Electric Industry Co., Ltd.
International Classes:
H01L23/12; H01L21/3205; H01L23/52; H01L25/065; H01L25/07; H01L25/18
Domestic Patent References:
| JP64023564A | ||||
| JP9064050A | ||||
| JP5029483A | ||||
| JP2006041450A | ||||
| JP2005294582A |
Attorney, Agent or Firm:
Tadahiko Ito
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