Title:
マルチチップシステム
Document Type and Number:
Japanese Patent JP4368614
Kind Code:
B2
Abstract:
Embodiments of the invention provide a multi-chip system that includes a first and a second semiconductor memory device. The memory devices are mounted in a single package. The multi-chip system has a continuous burst read mode of operation, in which a read operation can be successively carried out without latency even though an address region moves from the first semiconductor memory device to the second memory device.
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Inventors:
Cai Dong Hyuk
Appointment
Appointment
Application Number:
JP2003143235A
Publication Date:
November 18, 2009
Filing Date:
May 21, 2003
Export Citation:
Assignee:
SAMSUNG ELECTRONICS CO.,LTD.
International Classes:
G11C11/413; G06F12/02; G06F12/06; G06F13/28; G11C7/00; G11C11/401; G11C11/407
Domestic Patent References:
| JP2001035146A | ||||
| JP5233435A | ||||
| JP2003051194A |
Attorney, Agent or Firm:
Makoto Hagiwara