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Title:
有機薄膜集積回路の製造方法、及び、電界効果型トランジスタの製造方法
Document Type and Number:
Japanese Patent JP4779296
Kind Code:
B2
Abstract:

To provide a manufacturing method of an FET which does not need to use a resist material for forming a desired shape, and which does not require a mask for passing through organic thin film material etc.

The manufacturing method of the FET is provided with steps of: forming a gate electrode 12 on a base body 11, a step of thereafter forming a gate insulation film 13 on the base body 11 and the gate electrode 12; next forming source/drain electrodes 14 on the gate insulation film 13; thereafter forming an organic semiconductor thin film 15 on the whole surface; and next removing a part of the thin film 15 irradiated with energy beams only by irradiating the thin film 15 with the energy beams. Accordingly, the thin film 15 remains at the gate insulation film 13 between the source/drain electrodes 14 and on the source/drain electrodes 14, and a channel forming area 16 consisting of the thin film is formed.

COPYRIGHT: (C)2005,JPO&NCIPI


Inventors:
Tsutomu Imoto
Application Number:
JP2003412154A
Publication Date:
September 28, 2011
Filing Date:
December 10, 2003
Export Citation:
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Assignee:
ソニー株式会社
International Classes:
H01L21/302; H01L51/40; H01L21/268; H01L21/336; H01L27/28; H01L29/786; H01L51/00; H01L51/05
Domestic Patent References:
JP8018125A
JP2002229041A
JP2003347624A
JP2005079225A
Attorney, Agent or Firm:
Takahisa Yamamoto