Title:
プロセッサ、電子機器、割込み制御方法及び割込み制御プログラム
Document Type and Number:
Japanese Patent JP5167844
Kind Code:
B2
Abstract:
A processor 1 provided with a plurality of cores, an interrupt operation dedicated core 20 which is used only for an interrupt operation; a normal core 11 to 1n which outputs an interrupt request when an interrupt source is generated; and an interrupt control part 30 which, upon receipt of the interrupt request, assigns an operation by an interrupt vector to the interrupt operation dedicated core 20.
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Inventors:
Kumiko Suzuki
Application Number:
JP2008025616A
Publication Date:
March 21, 2013
Filing Date:
February 05, 2008
Export Citation:
Assignee:
NEC
International Classes:
G06F9/48
Domestic Patent References:
| JP2002334066A | ||||
| JP2007102781A | ||||
| JP7160656A | ||||
| JP63187339A | ||||
| JP4182834A |
Attorney, Agent or Firm:
Kihei Watanabe