Title:
積層セラミックキャパシタ及び積層セラミックキャパシタの実装基板
Document Type and Number:
Japanese Patent JP5684339
Kind Code:
B2
Abstract:
A multilayer ceramic capacitor includes: a ceramic body having dielectric layers laminated in a thickness direction, the dielectric layers having a greater width than a length; an active layer in which capacitance is formed, by including first and second internal electrodes alternately exposed to end surfaces of the ceramic body opposite to each other in a length direction with the dielectric layer interposed therebetween; upper cover layer; lower cover layers being thicker than the upper cover layer; and first and second external electrodes, wherein, when half of thickness of the ceramic body is denoted by A, thickness of the lower cover layer is denoted by B, half of thickness of the active layer is denoted by C, and thickness of the upper cover layer is denoted by D, 1.042≤(B+C)/A≤1.537 is satisfied.
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Inventors:
アン・ヨン・ギュ
キム・ド・ヨン
パク・ミン・チョル
イ・ビョン・ファ
パク・サン・ス
キム・ド・ヨン
パク・ミン・チョル
イ・ビョン・ファ
パク・サン・ス
Application Number:
JP2013146282A
Publication Date:
March 11, 2015
Filing Date:
July 12, 2013
Export Citation:
Assignee:
サムソン エレクトロ−メカニックス カンパニーリミテッド．
International Classes:
H01G4/30; H01G4/12; H05K1/18
Attorney, Agent or Firm:
Koen Kato
Fukukawa 晋矢
Fukukawa 晋矢