Title:
アナログデジタル変換器及び変換方法
Document Type and Number:
Japanese Patent JP5825603
Kind Code:
B2
Abstract:
A converter (200) adapted to convert an analog input signal (VIN) into a digital output signal includes an analog input terminal (205) for receiving the analog input signal, a Redundant Signed Digit (RSD) stage (210, 300) coupled to the analog input terminal, and a digital section (220). The RSD stage is configured to receive the analog input signal at the analog input terminal, produce a first number of bits (D0, D1, D2) at a digital output from the analog input signal during a first half of a first clock cycle, provide a residual feedback signal (VR) of the analog input signal at the analog input terminal during a second half of the first clock cycle, and produce a second number of bits (D0, D1) at the digital output from the residual feedback signal during a first half of a second clock cycle, the second number of bits less than the first number of bits.
Inventors:
Mohammad Nizam You Cover
Douglas A. Garrity
Brandt Blasswell
Douglas A. Garrity
Brandt Blasswell
Application Number:
JP2011151483A
Publication Date:
December 02, 2015
Filing Date:
July 08, 2011
Export Citation:
Assignee:
Freescale Semiconductor, Inc.
International Classes:
H03M1/14; H03M1/12
Domestic Patent References:
| JP2005526420A | ||||
| JP11308111A |
Foreign References:
| US20080191919 |
Attorney, Agent or Firm:
Tadahiko Ito
Shinsuke Onuki
Tadashige Ito
Shinsuke Onuki
Tadashige Ito