Title:
配線基板及びその製造方法と電子部品装置
Document Type and Number:
Japanese Patent JP6773518
Kind Code:
B2
Abstract:
A wiring substrate includes a first insulation layer having a component mounting area and a mark formation area, an electrode pad arranged in the component mounting area and having an upper surface exposed from the first insulation layer and a side surface and a lower surface embedded in the first insulation layer, and a mark arranged in the mark formation area and formed of an insulation pattern layer having an upper surface exposed from the first insulation layer and a side surface and a lower surface embedded in the first insulation layer. A color of the first insulation layer and a color of the insulation pattern layer are different.
Inventors:
Kotaro Kotani
Application Number:
JP2016207497A
Publication Date:
October 21, 2020
Filing Date:
October 24, 2016
Export Citation:
Assignee:
Shinko Electric Industry Co., Ltd.
International Classes:
H05K1/02; H01L23/00; H01L23/12; H05K3/00; H05K3/46
Domestic Patent References:
| JP2008300666A | ||||
| JP2008258520A | ||||
| JP2009088011A |
Attorney, Agent or Firm:
Tadashige Ito
Tadahiko Ito
Tadahiko Ito