Title:
ACTUAL MEMORY STRUCTURE OF MICROCOMPUTER
Document Type and Number:
Japanese Patent JPS5794873
Kind Code:
A
Abstract:
A microcomputer system has a microprocessor (25) whose functions are implemented by instructions and data from a directly connected random access memory (RAM) (12). The capacity of the RAM is less than the typical total instruction list for the microprocessor. A read-only mass memory (14) is connected to the RAM and has permanently stored instructions set therein for the microprocessor. A controller (20a, 20b) controls the flow of instructions from the mass memory to the RAM as required and also controls the flow of instructions and data between the RAM and microprocessor. The instructions from the mass memory are overlayed in the RAM in areas no longer required for instruction execution (Fig. 1).
Inventors:
DEBITSUDO ESU RAFUITSUTE
CHIYAARUZU DABURIYU SUKERUTON
PATORISHIA ERU RODEI
DEBITSUDO ERU FURAWAA
CHIYAARUZU DABURIYU SUKERUTON
PATORISHIA ERU RODEI
DEBITSUDO ERU FURAWAA
Application Number:
JP15351081A
Publication Date:
June 12, 1982
Filing Date:
September 28, 1981
Export Citation:
Assignee:
TEXAS INSTRUMENTS INC
International Classes:
G06F15/78; G06F9/445; G06F12/02; G06F12/06; (IPC1-7): G06F13/00; G06F15/06; G11C9/06
Other References:
AFPIS CONFERENCE PROCEEDINGS=1970US