To provide an amplifier circuit capable of outputting an output voltage having a fixed amplitude irrespective of a magnitude of the amplitude of an input signal.
This amplifier circuit comprises: a first MOS transistor (102a) of which a gate is connected to a first input terminal for inputting a positive logic input signal or a reference potential and a drain is connected to a first load, a second MOS transistor (102b) which is paired to the first MOS transistor, and of which the gate is connected to a second input terminal for inputting a negative logic input signal or the reference potential constituting the positive logic input signal and a differential input signal and the drain is connected to an output terminal and a second load, and a current source (320) which is connected to sources of the first and second MOS transistors, flows a fixed current when a difference in voltages of the first and second input terminals is within a predetermined range and changes a current flowing when not within the predetermined range.
NAKAMOTO JUNKO
SHOU ENEN
