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Title:
APPARATUS AND METHOD FOR CHECKING OF CONNECTION OF TERMINAL
Document Type and Number:
Japanese Patent JPH11160383
Kind Code:
A
Abstract:

To detect the connection defect of a plurality of terminals simply and surely without rewriting existing data in a nonvolatile storage part inside a memory device by a method wherein a connection checking apparatus which is used to check the connection state of the plurality of terminals of the memory device on which the nonvolatile storage part is mounted is provided with a data storage part, with a changeover control part and with a data detection part.

A memory card on which a nonvolatile storage part 1 and a data storage part 2 are mounted is built in an adaptor 7. The data storage part 2 stores connection checking data which is used to check the connection state of a plurality of terminals 5 (address terminals AO to AN, data terminals DO to DM and other terminals) which are derived from a device card 6. In a changeover control part 3, a changeover-control-signal generation circuit which outputs a changeover control signal Ssc used to change over the connection recognition data to an access state from the storage part 2 is installed. A personal computer in a data detection part 4 checks the existence of the connection defect of the plurality of terminals 5 on the basis of the connection checking data by the signal Ssc.


Inventors:
SHIMIZU NAOKI
Application Number:
JP33191497A
Publication Date:
June 18, 1999
Filing Date:
December 02, 1997
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G01R31/04; G06F11/22; G11C29/02; G11C29/48; (IPC1-7): G01R31/04; G06F11/22
Attorney, Agent or Firm:
Takashi Ishida (3 others)