PURPOSE: To detect the number of pieces of prescribed levels in an input at a high speed by forming the arithmetic processon so that the number of pieces of prescribed levels in an input can be detected by an exclusive circuit configuration.

CONSTITUTION: By a prescribed level one side bringing-nearer circuit 101, a prescribed level in an input I is brought nearer to one side of its output in accordance with the number of pieces of prescribed levels. Also, by a comparison value processing circuit 102, a prescribed level output corresponding to a comparison value H supplied from the outside is generated. Subsequently, these output of the prescribed level one side bringing-nearer circuit 101 and output of the comparison value processing circuit 102 are supplied to logic processing circuit 103, and when the number of pieces of prescribed levels in the input I exceeds the number corresponding to the comparison value H supplied from the outside,a processing for outputting a result value R determined in advance is executed. In such a way the number of pieces of prescribed levels in the input can be detected at a high speed.