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Patent Searching and Data


Title:
BALL GRID ARRAY PACKAGE
Document Type and Number:
Japanese Patent JP2002043461
Kind Code:
A
Abstract:

To provide an IC package having a high-density I/O wherein an IC chip is bonded to a silicon intermediate interconnect substrate (IIS) and the IIS is wire-bonded to a printed wiring board(PWB).

This package comprises the PWB having wire-bonding pads on its upper surface, the semiconductor IIS, a means for die-bonding the lower surface of the IIS to the upper surface of the PWB, and a means for wire- bonding the wire-bonding pads on the IIS to the wire-bonding pad on the PWB. Further, the IIS comprises a semiconductor substrate having a center region on its upper surface, IIS interconnect sites on the center region of the upper surface of the semiconductor substrate, the IIS wire-bonding pads around the center region of the upper surface of the semiconductor substrate, and a metallized runner which interconnects the IIS interconnect sites with the IIS wire- bonding pads.


Inventors:
DEGANI YINON
DUDDERAR THOMAS D
FRYE ROBERT CHARLES
Application Number:
JP2000199728A
Publication Date:
February 08, 2002
Filing Date:
June 30, 2000
Export Citation:
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Assignee:
LUCENT TECHNOLOGIES INC
International Classes:
H05K3/34; H01L23/12; H01L23/32; (IPC1-7): H01L23/12; H01L23/32; H05K3/34
Attorney, Agent or Firm:
Masao Okabe (12 others)