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Patent Searching and Data


Title:
LOW INDUCTANCE TYPE ELECTRONIC COMPONENT PACKAGE AND MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP2002043459
Kind Code:
A
Abstract:

To provide a semiconductor package for a GHz band where an electronic component package consisting of a printed wiring board using a metal base 1 as the base is improved, a length of a bonding wire is shortened to 1/2-2/3 or less of a conventional length, e.g. about 1 mm or less, and an inductance of the portion becomes 0.7 nH or less, and to provide its manufacturing method.

A metal base 1 of a copper alloy plate or the like that is thicker than a LSI chip 5 is used, the metal substrate 1 is subjected to half-punching procedure in order to form a cavity for housing the LSI chip 5, and the periphery part of the cavity is formed by using the shear surface S which is at the right angle with respect to the main plane of the printed wiring board. A pad part 7 for a ground is formed so as to circumscribe the shear surface S, required lengths of bonding wires 11, 12, 13 are made shortest by arranging a plurality of bonding pads 8, 9 in its circumference, and the inductance is made low to the limit.


Inventors:
TANAKA HIROBUMI
KUWABARA NAOKI
FUJITA KAZUTO
MORITA MORIJI
Application Number:
JP2000223652A
Publication Date:
February 08, 2002
Filing Date:
July 25, 2000
Export Citation:
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Assignee:
MITSUI CHEMICALS INC
International Classes:
H01L23/12; (IPC1-7): H01L23/12
Attorney, Agent or Firm:
Shotaro Mogami