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Patent Searching and Data


Title:
BUS DRIVER/RECEIVER
Document Type and Number:
Japanese Patent JPH02228757
Kind Code:
A
Abstract:

PURPOSE: To reduce a noise from a digital circuit side to an analog circuit side by dividing the bus having the width of plural bits between a driver and a receiver into plural groups, executing the transmission/reception of the most- significant bit in each group as it is and executing the transmission/reception of an exclusive OR output between the most-significant bit in each group and the other bit in the group.

CONSTITUTION: A bus between a driver 4 and a receiver 5 is divided into the plural groups. Then, the driver 4 and receiver 5 are constituted so that the transmission/reception of the most-significant bit in each group can be executed as it is and the transmission/reception of the exclusive OR output between the most-significant bit in each group and the other bit in the group can be executed. Accordingly, processing can be naturally executed by a binary code in digital circuit parts 1 and 2 and the bit change of the binary code is reduced on the bus 3. Thus, the noise to the analog circuit part can be reduced.


Inventors:
UJIIE HIROYUKI
Application Number:
JP4863089A
Publication Date:
September 11, 1990
Filing Date:
March 02, 1989
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F13/36; (IPC1-7): G06F13/36
Attorney, Agent or Firm:
Shoji Kashiwaya (1 person outside)