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Title:
CHEMICAL MECHANICAL POLISHING OF PCMO THIN FILM IN RRAM DEVICE
Document Type and Number:
Japanese Patent JP2006121044
Kind Code:
A
Abstract:

To provide a CMR layer of a CMOS integrated circuit by a method that can be commercially achieved in a manufacturing method of the CMR layer in the CMOS integrated circuit, including CMP of the CMR layer in a manufacturing process.

A forming method for forming a CMR layer in a CMOS device, using CMP (chemical mechanical polishing) for patterning the CMR layer comprises a step of preparing a silicon substrate including the formation of a lower electrode in the silicon substrate; a step of depositing an SiNx layer on the silicon substrate; a step of patterning and etching the SiNx layer for forming a damascene trench on the lower electrode; a step of depositing a CMR material layer on the SiNx layer and the damascene trench; a step of removing the CMR material layer, covering the SiNx layer by CMP and leaving the CMR material layer in the damascene trench; and a step of completing a CMOS structure.


Inventors:
PAN WEI
EVANS DAVID R
BURMASTER ALLEN
Application Number:
JP2005245555A
Publication Date:
May 11, 2006
Filing Date:
August 26, 2005
Export Citation:
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Assignee:
SHARP KK
International Classes:
H01L21/304; B24B37/00; H01L27/10
Attorney, Agent or Firm:
Yoshifumi Masaki