Title:
CLOCK CONTROL SYSTEM OF MEMORY DEVICE
Document Type and Number:
Japanese Patent JPS5323239
Kind Code:
A
Abstract:
PURPOSE: At the memory device which is constituted by using a charge transfer device, a clock frequency is changed over depending upon access frequency to utilize the performance of the device at its maximum, thereby realizing both high processing performance and low power consumption.
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Inventors:
HAYASHI SHIGEO
Application Number:
JP9760576A
Publication Date:
March 03, 1978
Filing Date:
August 16, 1976
Export Citation:
Assignee:
HITACHI LTD
International Classes:
G11C19/00; G11C11/4076; G11C27/04; H03H11/26; (IPC1-7): G11C11/24; G11C11/34; G11C19/28; H03H7/30