Title:
CLOCK OSCILLATION CIRCUIT AND VOLTAGE CONTROLLED OSCILLATION CIRCUIT USING THE CIRCUIT
Document Type and Number:
Japanese Patent JP3487942
Kind Code:
B2
Abstract:
PURPOSE: To provide a clock oscillation circuit which executes a free-running oscillation at a great rate frequency.
CONSTITUTION: In SR-FF20C, the level of a clock signal CK in an output terminal Q is given to a gate 20A, and the level of an inverse clock signal CK/in an inverse output terminal Q/is given to a gate 20B. The gate 20A obtains the inverted value of AND between the level obtained by inverting a phase control signal S1 and the level of the signal CK/. When the signal S1 is 'L', SR-FF20 is set or reset by the inverted value of AND and the inverted value of OR and it executes a free-running oscillation. Time for one period in the free-running frequency becomes only the fall time of the signal CK and the signal CK/, and the time is set by the capacitance value of respective capacitors 51 and 52. When the signal S1 becomes 'H', SR-FF20 is set and the phases of the signal CK and the signal CK/change.
Inventors:
Yoshikazu Yoshida
Takashi Taya
Yokoyama
Shuichi Matsumoto
Takashi Taya
Yokoyama
Shuichi Matsumoto
Application Number:
JP3566995A
Publication Date:
January 19, 2004
Filing Date:
February 23, 1995
Export Citation:
Assignee:
Oki Electric Industry Co., Ltd.
International Classes:
H03K3/02; H03L7/099; H04L7/033; (IPC1-7): H04L7/033; H03K3/02; H03L7/099
Domestic Patent References:
| JP1307310A | ||||
| JP58210717A | ||||
| JP738388A | ||||
| JP5773518A |
Attorney, Agent or Firm:
Yasunari Kakimoto