Title:
METHOD/DEVICE FOR COMPRESSING DIGITAL SIGNAL AND RECORDING MEDIUM
Document Type and Number:
Japanese Patent JP3334375
Kind Code:
B2
Abstract:
PURPOSE: To prevent the efficiency deterioration of block floating and quantization by controlling the frequency size of a small block executing floating in accordance with a characteristic on the frequency axis of an input signal and executing optimum floating.
CONSTITUTION: Spectrum data supplied to an input terminal 301 is transmitted to a change quantity calculation circuit 303. Change quantity for respective frequencies is calculated and it is transmitted to an integrating comparsion circuit 304. The circuit 304 integrates change quanitty data and compares it with a threshold. Then, the frequency when an integrating value exceeds the threshold is transmitted to a block floating unit decision circuit 305. A unit correction circuit 306 corrects the boundary of the block floating unit from the circuit 305 from output from an energy calculation circuit 307 and a standard unit output circuit 309 and outputs it to an adaptive bit encoding circuit. The circuit 306 evaluates the quantity of auxiliary data in the unit after correction by the output of the circuit 307, the efficiency of block floating and information quantity required at the time of quantization so as to decide the adoption of the unit.
Inventors:
Hiroyuki Suzuki
Application Number:
JP26501294A
Publication Date:
October 15, 2002
Filing Date:
October 28, 1994
Export Citation:
Assignee:
ソニー株式会社
International Classes:
G11B20/10; H03M7/30; H04B14/04; (IPC1-7): H03M7/30; G11B20/10; H04B14/04
Domestic Patent References:
| JP695698A | ||||
| JP5313694A | ||||
| JP4302540A |
Attorney, Agent or Firm:
Akira Koike (2 outside)
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