Title:
CURRENT SAMPLE/HOLD CIRCUIT, CURRENT SAMPLE/HOLD METHOD, REVERSE DEMULTIPLEXING DEVICE USING SAME, AND DISPLAY DEVICE
Document Type and Number:
Japanese Patent JP3850425
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a sample/hold circuit having different current source/sink configuration in each input end and output end.
SOLUTION: The sample/hold circuit includes a first transistor for sampling and holding a data current to be absorbed into an output end of a data driver, a capacitor, and a plurality of switches. When the data current which is sampled and held is provided to a data line, the data current is absorbed into the output end of the sample/hold circuit. The sample/hold circuit can be used with the data driver having the output end which has the current sink configuration.
Inventors:
Shinto Ryo
Application Number:
JP2004276106A
Publication Date:
November 29, 2006
Filing Date:
September 22, 2004
Export Citation:
Assignee:
SAMSUNG SDI Co., LTD.
International Classes:
G09G3/20; H03K17/00; G06G7/12; G06G7/26; G09G3/30; G09G3/32; G11C27/02; H03K17/687; H03M1/12; H05B33/00; (IPC1-7): H03K17/00; G09G3/20; G09G3/30; H03K17/687; //H03M1/12
Domestic Patent References:
| JP2000039926A |
Foreign References:
| WO1998011554A1 |
Other References:
Renyuan Huang Chin-Long Wey ,Design of high-speed high-accuracy current copiers for low-voltage analog signal processing applications,Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on [see also Circuits and Systems II: Express Briefs, IEEE Transactions on] ,1996年12月,Volume: 43 , Issue: 12 ,p.836 - 839
Attorney, Agent or Firm:
Miaki Kametani
Tetsuo Kanamoto
Tetsuo Kanamoto