Title:
CURRENT MIRROR CIRCUIT
Document Type and Number:
Japanese Patent JP3407819
Kind Code:
B2
Abstract:
PURPOSE: To attain highly accurate current conversion by providing a 5th transistor(TR) receiving an output current signal detected by a 3rd TR of a current mirror circuit and outputting a current corresponding to a current for negative feedback control of a 1st TR to an output terminal additively to the current mirror circuit.
CONSTITUTION: A TRQ3, a TRQ5 whose base and emitter are connected in common, a TRQ6 of diode connection are connected in series between an output terminal 2 and ground with respect to the current mirror circuit comprising TRs Q1-Q4. An emitter of the TRQ6 connects to a collector of the TRQ5 and the TRs Q4, Q5 are biased identically corresponding to a voltage state at the output terminal 2. When the terminal 2 is biased to be 2VBE, the collector- emitter voltage VCE of the TRs Q4, Q5 are set identically by the insert of the TRQ6 to maintain an emitter current amplification factor β of both TRs to be identical. Thus, an output current Io with a very small error with respect to a reference current Ir is generated in this way. The multiple of the current Io is selected by the ratio of the size of the TRs and then current conversion with high precision is attained.
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Inventors:
Takao Morishita
Application Number:
JP4333894A
Publication Date:
May 19, 2003
Filing Date:
February 18, 1994
Export Citation:
Assignee:
New Japan Radio Co., Ltd.
International Classes:
G05F3/26; H03F3/343; (IPC1-7): H03F3/343
Domestic Patent References:
| JP5110352A | ||||
| JP56144612A |
Attorney, Agent or Firm:
Tsuneaki Nagao