Title:
CURRENT TYPE SENSE CIRCUIT
Document Type and Number:
Japanese Patent JP3225480
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To realize high speed switching operation by separating the circuit nodes of a first and a second gate grounded type amplifying circuits and grounding these circuits via the predetermined impedance elements.
SOLUTION: Using the N-channel MOS transistors(Tr) Q71, Q72, a current signal input to the input terminals T1, T2 is converted into a voltage signal and the circuit nodes of the first and second gate grounded type amplifying circuits output to the nodes T5, T6 are separated into the nodes T71, T72. Thereby, a discharge current of a load capacitor C2 does not flow into Tr Q72 and the potential of node T71 does not rise. Moreover, since the discharge current flows into Tr Q71, a back electromotive force is generated across this transistor, resulting in rise of voltage level at the node T71. Accordingly, discharge of the load capacitor C2 does not prevent drop of voltage level at the node T6 and causes the voltage level of the node T5 to rise, accelerating intrinsic voltage increasing operation of the node T5. Thereby, it can be prevented that the discharge current impedes the switching operation.
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Inventors:
Shintaro Shibata
Application Number:
JP32241695A
Publication Date:
November 05, 2001
Filing Date:
November 17, 1995
Export Citation:
Assignee:
Nippon Telegraph and Telephone Corporation
International Classes:
G11C11/419; G11C11/409; (IPC1-7): G11C11/419; G11C11/409
Domestic Patent References:
| JP7230694A | ||||
| JP863976A | ||||
| JP684377A |
Other References:
柴田信太郎、”低電圧メモリにおける電流型センス回路の構成法”、電子情報通信学会技術研究報告、社団法人電子情報通信学会、平成７年５月、第９５巻、第７１号、Ｐ．３９−４６
Attorney, Agent or Firm:
Tsuneaki Nagao