Title:
DAC AMPLIFIER
Document Type and Number:
Japanese Patent JP3519487
Kind Code:
B2
Abstract:
PURPOSE: To optimize set ring time for all the output by providing a correction signal generator in an integrator and inputting a correction signal which shortens the set ring time of an operational amplifier by the correction signal generator to the integrator.
CONSTITUTION: A correction pulse e2 generated from a programmable correction pulse generator 5 is supplied to one input terminal of the slow-speed operational amplifier 8 of the integrator (resistor 13, slow-speed operational amplifier 8 and capacitor 14) via a resistor 12. The polarity of the correction pulse e2 is the one opposite to the polarity of differential potential generated when a step voltage e1 rises. The amplitude (pulse height) and pulse width of the correction pulse e2 are selected so that the product (pulse area) of them can be equal to the integral capacity (amplitude is integrated by time) of the differential potential. The change of potential V is reduced by setting the pulse area equal to the integral capacity of the differential potential, and a transient voltage superimposed on an output voltage e3 is reduced, which optimizes (shortens) the set ring time of the output voltage e3.
Inventors:
Kusakabe, Hideo
Application Number:
JP5608895A
Publication Date:
April 12, 2004
Filing Date:
March 15, 1995
Export Citation:
Assignee:
TOSHIBA CORP
International Classes:
G06G7/186; (IPC1-7): G06G7/186
Attorney, Agent or Firm:
鈴江 武彦
Previous Patent: MAGNETIC RESONANCE DIAGNOSTIC SYSTEM
Next Patent: APPARATUS FOR WASHING METALLIC PARTS BY ORGANIC SOLVENT
Next Patent: APPARATUS FOR WASHING METALLIC PARTS BY ORGANIC SOLVENT